TSK3000A - Data Transfer Instructions
Data transfer between memory and general purpose registers (GPRs) is handled using Load and Store instructions. All of these instructions are I-type instructions.
The only directly supported addressing mode is base register plus 16-bit signed immediate offset. The instruction position immediately following a load instruction is referred to as the 'load delay slot'. The size of data to be loaded or stored is determined by the opcode for the instruction.
Note: In the following table, the IMM16 operand can be an absolute offset or a symbolic address label.
Table 1. Data Transfer Instructions.| Mnemonic | Instruction | Description |
|---|---|---|
LB rB, IMM16(rA) | Load Byte | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then sign-extends the byte at the memory location pointed to by the effective address and loads the result into GPR rB |
LBU rB, IMM16(rA) | Load Byte Unsigned | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then zero-extends the byte at the memory location pointed to by the effective address and loads the result into GPR rB |
LH rB, IMM16(rA) | Load Halfword | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then sign-extends the halfword at the memory location pointed to by the effective address and loads the result into GPR rB |
LHU rB, IMM16(rA) | Load Halfword Unsigned | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then zero-extends the halfword at the memory location pointed to by the effective address and loads the result into GPR rB |
LW rB, IMM16(rA) | Load Word | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then loads the word at the memory location pointed to by the effective address into GPR rB |
SW rB, IMM16(rA) | Store Word | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then stores the contents of GPR rB at the resulting effective address |
SB rB, IMM16(rA) | Store Byte | Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then stores the least significant byte of register rB at the resulting effective address |
SH rB, IMM16(rA) | Store Halfword | Generates an unsigned 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then stores the least significant halfword of register rB at the resulting effective address |