Custom Logic Tutorial - Adding the C-based Custom Logic

Now we have our 'shell' design, we need to add-in the custom logic – the functional heart of the design, written in C code.

The ability to incorporate underlying C code into an FPGA design is an extension to the concept of design hierarchy. Similar to the way in which a schematic sub-sheet or HDL file (VHDL/Verilog) is referenced by a Sheet Symbol on the parent design schematic, the C source file is referenced by use of a C Code Symbol.

Hierarchical net and bus connectivity between documents obeys the standard hierarchical project connection behavior, where parameters for the referenced function in the C source file connect to C Code Entries of the same name in the C Code Symbol that represents that document, as shown by example in Figure 1. The C Code Entries allow for connection to other logic in the design.

Note: Each C Code Symbol is associated with one top-level exported function in a C source file. However, this exported function may call other functions, which themselves may be distributed across several C source files.

Figure 1. Adding custom logic through creation of hierarchical FPGA designs.

Depending on your preferred method of working, there are two ways to create the interface to your custom logic:

• You can place a C Code Symbol and add the required parameters – either by manually placing C Code Entries or by defining the parameters directly in the properties dialog for the symbol. Once done you can then use a command to generate a 'shell' C source file for addition to your project.

• You can write your C code first and then use a command to generate the C Code Symbol and related C Code Entries automatically. If your source file contains multiple functions, you will be able to choose which function you wish to export.

For this tutorial, we will use the second of these methods.

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