CoreMP7 Interrupts
The Altium Designer CoreMP7 component supports both hardware exceptions (interrupts) and software exceptions. In terms of hardware exceptions, only the Interrupt Request exception (IRQ) is supported. The Fast Interrupt Request exception (FIQ) is not and the corresponding input pin associated with this exception type – nFIQ – has been internally tied High.
Of the 32 external interrupt input signals that can be wired to the INT_I pin of the wrapper's Peripheral I/O interface (the interface of the wrapper around the processor) only the lowest line is connected internally to the CoreMP7's actual nIRQ port. An intermediate inverter is used to ensure that when INT(0) of the wrapper goes High, the nIRQ line of the CoreMP7 is taken Low.
The CoreMP7 Interrupt Handler is then used to process an interrupt.
IRQ is only possible if the I bit in the Current Program Status Register (CPSR.7) is zero. Once an exception is encountered and entered, the Interrupt Handler will automatically set this bit High to prevent further interrupt requests. Upon leaving the exception, the Interrupt Handler will clear this bit, to allow for subsequent interrupt requests.
For more detail on exceptions, refer to the ARM7TDMI-S Technical Reference Manual (available from www.arm.com).