Configuring Pin Swapping for an FPGA Component
Before any pin swapping can occur, swap-ability information must first be set up for the FPGA component in question.
Pin swap settings are stored in the schematic component's pins, while the option to allow pin swapping on a specific component is enabled in the PCB editor, and stored in the PCB component.
Configuration at the design level is performed using the Configure Swapping Information In Components dialog (Figure 1). This dialog can be accessed by:
- Using the Tools » Configure Pin Swapping command from the Schematic or Schematic Library editor main menus.
- Using the Tools » Pin/Part Swapping » Configure command from the PCB editor main menus.
Figure 1. Top-level summary of component swap information (as accessed from the PCB editor).
The dialog lists all components in the design (or library) along with their current swap settings. Double-clicking on a component entry will give access to the Configure Pin Swapping dialog for that component, from where you can define the swap settings for pin swapping accordingly. Alternatively, access the dialog directly for a given component by right-clicking on that component in the schematic or PCB workspace and choosing the command to configure pin swapping from the Part Actions or Component Actions context menu respectively.
Figure 2 illustrates an example of this dialog. Set up Pin Groups as required. For example, you may have one group for general IO pins, another for global clock pins, and additional distinct groups for input pins and output pins.
Figure 2. Providing swap control through the assignment of pins to specific Pin Groups.
All pins within the same Pin Group can be freely swapped. The group identifier itself is simply a text string – you can assign any alphanumeric value to it. For example, to enhance readability, the Pin Group assigned to the input pins in Figure 2 could have been called Input.
Assign each I/O pin on the device to the required Pin Group. Either type the identifier for the group directly in the Pin Group field, or use the right click menu to assign groups based on any of the Pin Status or FPGA Attributes fields. Alternatively, select a group of pins and use the right-click menu to add them to an existing or new group.
Figure 3. Use the dialog's right-click menu to quickly assign pins to Pin Groups.
Once all Pin Groups have been defined as required, click OK to commit the changes to the schematic component. If the Configure Pin Swapping dialog was accessed from the Configure Swapping Information In Components dialog, you will return to that dialog. The Pin Swap Data field will be marked as modified and reflect the total number of pins assigned to pin groups for swapping purposes.
Figure 4. Example of modified Pin Swap Data field, reflecting number of pins assigned to pin groups.
It is important to first define the Pin Group information, since it may not be desirable (or allowable) for all pins to be swapped with one another. While all I/O pins within an FPGA can theoretically be swapped to give a better layout for routing, conditions may dictate otherwise. Firstly, some pins have additional special functions (clock pins, config pins and VREF pins to name a few) and it may be preferable to reserve these for their special purpose. Secondly, setting limitations here will allow any swapping process to obey the banking and I/O standards requirements as described earlier. For this reason, it may be desirable for pins in a certain bank to only be swappable with each other (or perhaps other banks with compatible I/O standards).