Automatic FPGA-PCB Linking - Verifying that the Projects are Linked

Verification that the automatic linking of the projects has been successful can be made from two places:

• By interrogating the Sub-Design Links region of the Component Properties dialog, for the FPGA component on the PCB project's schematic sheet. When successfully linked, the FPGA project will appear in the Sub-Project field. The name of the specified configuration will appear in the Configuration field.
   
  
  Figure 1. Verifying linkage in the properties dialog for the FPGA component in the PCB project.
   
• By interrogating the Projects panel, when configured in Structure Editor mode. When successfully linked, the FPGA project will appear under the structure of the PCB project – as a sub-entry of the FPGA component in the PCB project to be more specific. Note that you will need to compile the PCB project first.
   
  
  Figure 2. Verifying linkage in the Projects panel.

For more detailed information on the use of the Projects panel in Structure Editor mode, press F1 while the cursor is over the (focused) panel.