Signal Integrity Analysis

This area is dedicated to documentation for Altium's Signal Integrity Analysis capabilities.

Using Altium Designer's Signal Integrity Analyzer, preliminary impedance and reflection simulations can be run from your source schematics prior to final board layout and routing. This allows you to address potential Signal Integrity issues, such as mismatched net impedances, before committing to board layout.

Full impedance, signal reflection and crosstalk analysis can be run on your final board (or a partially routed board) to check the real-world performance of your design. Signal Integrity screening is built into the Altium Designer design rules system, allowing you to check for Signal Integrity violations as part of the normal board DRC (Design Rule Checking) process. When Signal Integrity issues are found, Altium Designer shows you the effects of various termination options, allowing you to find the best solution before modifying your design.

See Also

• Performing Signal Integrity Analyses
• Ibis Model Implementation Editor
• Putting Signal Integrity in its Place
• Tutorial - Checking Signal Integrity on an FPGA Design