Facilitating Real-Time Debugging of a Processor

To facilitate real-time debugging of a 32-bit processor, the processor must be configured to include JTAG-based On-Chip Debug System (OCDS) hardware. For the following processors, this hardware is permanently installed:

• CoreMP7

• PPC405A

For other supported 32-bit processors (TSK3000A, MicroBlaze, NiosII), this hardware is a configurable option, defined for the processor in its associated Configure (32-bit Processors) dialog (Figure 1). The option to include the debug hardware is enabled by default.

Figure 1. Enabling the On-Chip Debug System for a 32-bit processor (TSK3000A).

With the debug hardware installed, the following set of functional features are provided:

• Reset, Go, Halt processor control

• Single or multi-step debugging

• Read-Write access for internal processor registers

• Read-Write access for memory and I/O space

• Unlimited software breakpoints.