Combinatorial vs. Multi-Cycle Circuits

The C-to-Hardware Compiler can generate two types of circuit from the C source code for an exported function – Combinatorial and Multi-cycle. Referred to as the 'interface mode' for the C Code Symbol, the type of circuit is specified as part of the C Code Symbol's properties or, more specifically, as part of the 'function signature' – the interface definition used to essentially 'hook' the C source function to the C Code Symbol.

It is worth looking more closely at the difference between the two:

• Combinatorial – this type of circuit consists of logic gates whose outputs at any time are determined only by the values of the inputs. In this interface mode, only the parameters of the exported function appear as C Code Entries on the C Code Symbol, commonly referred to as 'Parameter' entries.
   
  
  Figure 2. C Code Symbol with Combinatorial interface.  
  Combinatorial circuits can be generated for simple C functions which do not depend on stored state (memory, previous executions, etc). The C-to-Hardware Compiler will attempt to create a combinatorial circuit if requested but if this is not possible, an error will be issued during compilation and the interface mode must be changed to Multi-cycle. Note that if a function accesses global variables, this implies stored state and therefore a combinatorial circuit cannot be generated.

• Multi-cycle – this type of circuit requires more than one clock cycle to complete. When this interface mode is selected, additional START, DONE and CLOCK C Code Entries will automatically be added to the C Code Symbol, commonly referred to as 'Control' entries. These entries are not part of the exported C function.
   
  
  Figure 3. C Code Symbol with Multi-cycle interface.  
  The circuit begins operating when the START signal is High. The inputs are assumed to be valid. When the circuit finishes operating, the DONE signal will be driven High and the outputs will be valid for one clock cycle. Due to the short availability of the outputs, external latching of the outputs is common practice.
   
  Note that if the Enable reset logic option is enabled, in the Variables region of the tab, reset logic will be built into the symbol, and two additional Control-type C Code Entries will be added to the symbol – RESET and RESET_DONE.

See Also

For a tutorial that explores the creation of custom FPGA logic using C, see Tutorial - Designing Custom FPGA Logic using C.