Mismatched Pin Visibility

Old Content - visit altium.com/documentation

This compiler hint is related to the power pins (VCC and GND) of a multi-part component. Typically, these pins are associated to part 0, are automatically connected to the VCC and GND nets for the design and are hidden. If, for one of the component parts, you enable visibility of such a pin, it is no longer connected to the target power net and the error will be flagged. The message is displayed in the Messages panel in the following format:

Pin is visible in one sub-part and hidden in another sub-part

Default Report Mode

Error

Recommendation

Either disable display of the offending power pin(s) in the workspace or, if keeping the pins displayed, ensure that a VCC and/or GND power port object is attached to the pin(s) accordingly.

You are reporting an issue with the following selected text and/or image within the active document: