Create Vhdl File From Sheet Symbol

Parent process: Sch:CreateSheetFromSheetSymbol

Applied parameters: DocumentKind=VHDL

Summary

This command is used to create a new VHDL document from a sheet symbol on the current schematic document. In this way, you can automatically create VHDL sub-modules for each of the sub-sheets of a multi-sheet schematic design, based on the sheet symbols you have created and placed on the top sheet.

First, ensure that the schematic sheet that contains the sheet symbol(s) is the active document in the main design window.

After launching the command, the cursor will change to a crosshair and you will be prompted to choose a sheet symbol. Simply position the cursor over the sheet symbol that you wish to create a VHDL document from and click or press ENTER. The VHDL document will be created and opened as the active document. The sheet entries on the symbol will be included as declared ports in the VHDL document's entity definition.

The template for the architecture will be defined, but the component and signal declarations are left ready for you to code in.

Availability

In Sch Editor, run command Design >> Create HDL File From Sheet Symbol >> Create VHDL File From Sheet Symbol.

Notes

The VHDL document that is created takes the sheet symbol designator to be its filename (SheetSymbolDesignator.VHD) and the sheet symbol filename as the name for its entity.