Verifying Your Design in Altium Designer

What do designers use as part of their daily arsenal in their approaches to design verification in order to be confident that their design is ready for PCB layout? Verifying that a design is correct is often the most difficult and yet also the most important aspect during this phase. The focus of this article will be on a discussion of issues that typically cause problems for designers before the PCB layout phase, reveal strategies that can be used by the designer to avoid these pitfalls, and how Altium Designer can be leveraged to work for them.

Design Verification Strategies

A good strategy for design checking and debugging integrates test case design techniques into a set of well-planned series of steps that result in the successful completion of designs and delivery to market. What you need is a roadmap for everything that will be conducted as a part of this process.
 

Verification - are we building the product right?

Testing is often a much broader topic that is also referred to as verification and validation.
Verification refers to those activities and procedures that ensure that a design is being correctly implemented. Validation refers to a slightly different set of activities that ensure a design is traceable to a certain set of requirements. It's an important difference to distinguish. More easily said:

Verification - "Are we building the product right?"
Validation - "Are we building the right product?"

As mentioned before, the scope of this article will focus on verification activities specific to electronic design in the pre-PCB layout phase, when problems are often the most difficult to find and require real diligence on the part of the designer. These approaches will be what we call strategies, and will focus on the more practical, hand's-on techniques that a designer can use as part of his daily arsenal for ensuring that they consistently hit their expected delivery dates with the desired level of quality - and successfully get the product right!

Many Human Factors in Verification

Designs are developed and engineered, not stamped out in the manufacturing sense. Because of this, there are many technical elements that come into play during the verification process, and it's worth mentioning that often the human element underlies most of them and can greatly influence the end result and quality.
 

 
For example, in companies that deliver mission-critical applications such as the space industry, often a major hurdle that must be overcome is the psychological effect on the quality of the review. No engineer is a robot and many details can influence the quality. Time-to-market stress is another major element that can create bad designs and nearly every company, regardless of their product and application, is faced with it.
While the focus of this article will not be on the human element, it's important to understand that this is an inherent factor that governs and affects the rest of the process.

A Verification Checklist - the Bare Minimum

So what are some of the more proven procedures used by the majority of successful companies who have adopted a more diligent approach to verification, and can be used in nearly every sense? Let's take a look:

• Never let the designer review his/her own design. While it's true that a designer may know their own design the best (which can speed things up), in mission-critical designs the trade-off may be a familiarity with the design that impedes their sense of objectivity.
• Having a checklist so that all errors can be found consistently and reliably every time, and then relayed back to the designer.
• Footprints for new components need to be tested before they can be used with any degree of confidence and success (this typically means printing out the footprint and placing the component to test, as well as checking pin to pad designator is mapped correctly and the pin function matches the pad).
• ERC/DRC checking the schematic and board, and determining the level of acceptable errors and warnings that the design may have.
• Every Gerber layer is always visually inspected for problems (some designers will even run DRC in the CAM Editor).
• Visually checking each layer.
• Printing and checking each layer.
• Gerber and drill registration.

Reviews that are conducted will usually include a generated schematic part list and verification that all of the part types are the correct ones, at the very minimum. Lastly, that all appropriate changes are properly updated to the PCB, especially in cases where there may be PCB rules embedded (line width, clearance), or test points in the schematic.

Libraries Strategies

Almost all companies have a database and use their own specific part numbers. One of the biggest challenges that designers face before they even start designing is verifying their libraries, and that approved symbols and footprints have been used. Of course, this begins with creating or accessing the actual library (symbols and footprints) since you can't start anything else if there are no parts previously available.

Creating Integrated Libraries

An integrated library in Altium Designer is one where the source symbol, footprint, and all other information (e.g. SPICE and other model files) are compiled into a single file. Using integrated libraries are a great way to start as they save tremendous time when verifying datasheets and footprints in a library. The advantage if the integrated library (which not all CAD packages have) is that you do it at the beginning and only once. You can then trust the Altium Designer won't make modifications in your work and displays everything that the designer needs to see when they need to see it.
During compilation, checks are made to see how relationships are defined, to validate the relationship between the models and the symbols and to bundle them into a single integrated library. This file can not be directly edited after compilation, further offering portability and security.
Compiling libraries, even if you don't use the integrated libraries but still use a source schematic or PCB library, will cross-check the symbol to pin mapping (which is a common source of errors). While this sounds like the obvious, it is vitally important that everything has been accurately checked and that each part meets the minimum requirements for the design. Only by ensuring this, can a designer be certain to avoid many problems before they even start designing.

Non-standard Component Types

Not all components are destined to be mounted on the assembled PCB, not all components are required in the Bill of Materials, and not all items that are mounted on the PCB need to be represented on the schematic. Altium Designer supports this through the Component Type property, set in the Component Properties dialog (in the library or on the schematic).
For example, the presentation and readability of your schematic might be enhanced for design checking by including a chassis mounted component that is wired to the PCB. If this component was not required in the BOM, then the component type can be set to Graphical. A graphical component is not included during schematic electrical verification, it is not included in the BOM, nor is it checked during schematic to PCB synchronization. In this case the Component Type is set to Graphical.

Another special class of component that is frequently used in verification would be a test point - this component is required on both the schematic and the PCB, it should be checked during design synchronization, but is not required in the BOM. In this case the Component Type is set to Standard (no BOM).
Another example of a special component kind would be a heatsink - typically it is not shown on the schematic (but could be), is not required to be checked during schematic electrical verification, but must be included in the BOM. In this case the component type is set to Mechanical.

Assigned Footprints

Back to the fact that most companies have a database and use their own part numbers, the issue of assigning footprints is one that is usually addressed when creating the library and in the beginning of a project. It almost always happens before even drawing the schematic. But footprints can still have modifications later during the PCB design phase, especially for adjusting footprint outlines when there is not much room on the board. In some companies it may even be practice to build a different part for each part in stock that goes with only one footprint to avoid issues in the PCB design phase.

The Footprint Manager

For library modifications during the schematic design phase, Altium Designer's schematic editor includes a powerful Footprint Manager. Launched from the Tools menu, the Footprint Manager lets a designer review and manage all the footprints associated with every component in the entire project. Multi-select support makes it easy to edit the footprint assignment for multiple components, change how the footprint is linked, or change the Current footprint assignment for components that have multiple footprints assigned. Design changes are applied through Altium Designer's standard ECO system, updating both the schematic and the PCB if required.
Designers who use general parts and then assign the footprints later often have lots of problems and the process of checking becomes much more difficult, so it is a really good idea to have procedures in place to address this issue ahead of time. One solution is that if and when a PCB designer is allowed to change the footprint, then a note is created in the schematic that can easily be read by someone else later who may not be familiar with the design.
To assist with this, Altium Designer has in-place editing in text frames and schematic notes, speeding the editing and review process, and allowing the designer to see the layout of the text as they enter it as shown below in Figure 3.

A Case Study: Components that look the same but are different
A certain organization has policies to maintain the rotation of footprints to a set standard, this means the PCB library needs to be designed carefully. To illustrate a problem with assigned footprints, a designer can have a situation where components can have an "identical" appearance and yet have completely different properties. A footprint rotated 0 degrees and one rotated 90 degrees can look the same and even have the same name. It would be ideal if one had a tool that compared every schematic symbol and footprint against a certain library and could report every anomaly found, especially graphical differences, but it often is not the case. This issue can usually only be detected by pick and place files, or later in the design phase by the company assembling the board. A simple design error that could have been found early on during library creation results in a costly mistake much later.
In another case study, a designer has one client that requires their component symbols to be drawn using component traditional drawing shapes, but his other client requires the same component symbol to be drawn in accordance with a specific standard.
On a related note, it's worth mentioning that in the schematic library editor, the Tools » Mode feature in Altium Designer will allow the designer to define multiple graphical representations of the one component. You'll just need to remember to have a schematic library open already before this toolbar can be seen as shown below in Figure 4:

Update from PCB Libraries

Changes made during the PCB design phase are usually footprint changes. In this case, verification needs to be done for footprints on the board against the corresponding footprints in the library. For such updates, there is a compliment to the Footprint Manager called Update from PCB Libraries, so that designers can have full confidence that the footprint that is on the board exactly matches those in the source libraries. It performs a full analysis and comparison of all objects in both the board and library version of each footprint, and details every difference in accordance with how the footprint is linked to the symbol on the schematic as shown in Figure 5.

For example, if in their schematic symbol, you specify a certain footprint and that footprint can come from any library, then the Update from PCB Libraries will look in any library that is installed. If a specific library is specified to be updated from, then only that library will be searched if it is installed.
For any footprints that do not match you can individually select if that footprint is to be updated or not.

Updating Components from Libraries

It's a common occurrence for references to footprint models, and the schematic symbol itself to be changed in the external database library. For example, a designer or librarian may change the number of pins in a component or add a test point to a component in a library. Any changes that occur will then need to be applied to all freshly-placed instances of any affected components so that the original component is replaced with the modified component.
In teams of designers, the library is usually managed and updated by a librarian so that the designers can be assured that they don't have just any footprint but that they have the correct one. This approach ensures that all appropriate updates have been made to the library as well.
From the schematic, the Tools » Update From Library enables you to update components on one or more schematic sheets of the active project, with information from components stored in selected schematic library documents. You can update the entire component, including graphics, models and parameters, or choose which of these are to be updated, and on which components.

Schematic Design Strategies

Once the designer has the library verified, they can start to confidently prepare the schematic. In PCB, there are rules that govern the board layout process, and online DRC to help you catch mistakes as you go, but in schematics verification isn't as cut and dry and requires much diligence on the part of the designer. While Electrical Rules Checking (ERC), or compiling as it is known in Altium Designer, may show you some of the connectivity problems that you can have, it won't show you everything.
Verification in schematic is a post-process to the design, so the checking stage can be overwhelming and is almost always done manually. The advantage, however, to checking in the schematic phase of a design is that the mistake is caught earlier in the design process when it's easier and more cost-effective to fix. Only a correct schematic can produce a correct PCB, so it is crucial that this step is not neglected - even if it is really boring to review.
Company policy and/or customer requirements may also dictate the review process for designers. Schematic reviews that are typically run most always include running the ERC but how they may choose to deal with resulting errors and warnings can vary greatly between companies. Where the delivery is mission-critical, it may be a requirement that there are no errors present and that the designer himself may not review his own design. At the opposite end of the spectrum for some commercial applications it can be acceptable to have errors and even warnings.

Compiling Versus Electrical Rules Check

Compilation is a cornerstone concept of the Altium Designer environment, and when the electrical rules checking (ERC) is performed. Even more, it is a process that also allows you to harness many powerful design features in addition to the ERC. The important thing to understand about compiling is that the connectivity model (which is essentially an internal net list) that is created as a result of the compilation is then available for the designer to use, and this is what is presented in the Navigator panel after doing a compile.
Using a schematic source document as an example, the compilation process starts with the analysis of all the logical files and the descriptions contained in them from your schematics. Then, all intelligence from your schematics design is extracted into an internal data structure that can then be used for many post-compilation activities, such as comparing and showing differences between schematics, parameter managing, parametric navigation of your design and much more.
Many issues are checked during compilation and not just electrical rules errors. 'Drafting' type errors, such as duplicate designators, net labels not touching wires, and duplicate sheet numbers are checked. There are some 75 error checks, as well as an electrical rules matrix that looks for the classic electrical issues, such as 2 output pins connected together. Additionally, there is a check for single pin nets in the Reports menu (detecting single pin nets that have a net label on them).
From the Navigator panel, a designer can see all the nets, the nodes in the nets and the components for the entire design - you can just click on the flattened hierarchy to see it. A designer can click on other objects in the Navigator panel as well to highlight them in the design, even if the object you clicked on spans many sheets.
Some useful navigation controls to help you navigate around a design include:
CTRL+double-click to go up and down the hierarchy (on a sheet symbol or port or sheet entry)ALT+click on a net object directly on the schematic to highlight that net on that sheet, very handy if you are tracing a net through a design.ALT+click on an object displayed in the Navigator panel to probe to this object on the schematic as well as the corresponding PCB, most useful in a multiple monitor configuration

Some Additional Comments on Techniques for any Design

For any complex design (flat or hierarchical), there are some techniques that a designer can use to make it easier to check the schematic. For example, it's common to provide a block diagram on the first page. Drawing simple objects such as circles, lines, and rectangles can be used as well. Some designers require the net list table (and not just for the global nets) to be placed on each page to allow easy checking, while others require a parts list especially if there are multi-gate parts on different sheets.

Design Notation

In Altium Designer, schematic arrows for the line objects supports a variety of head and tail shapes and assist in highlighting your design as shown in Figure 6 below.

Design Annotation

Manually changing reference designators to a different number can be dangerous, if you don't track these parts you can accidentally end up with several parts placed instead of one. For example 7400 has 4 logic gates: which are numbered U1:A, U1:B, U1:C and U1: D. When manually renamed they could become U1:A, U2:B, U3:C and U4: D. In the scenario where the power supplies are different, this simple renaming could cause the PCB to simply not work at all! Fortunately the error reporting options in Altium Designer are able to detect and report this type of mistake.

Different Approaches to Design

Another important point to make is that verifying a schematic for a PCB design and verifying a schematic for debugging a board can be two different things as designers will often only focus on what is important to them. For example, the PCB designer needs to know perhaps only a net list and which parts need to be placed together but the parts are divided into logical gates and placed on different pages. Then when it comes to debugging the board, it becomes hard to check all gates placed on different pages.
That's why some designers prefer to draw the component as one block with all pins as they show on the part itself. Having many wires crossing that area is confusing for the PCB designer, but is perfect for troubleshooting the board. This is a common problem and sometimes a designer cannot do much about it because it might be a company policy.
Not every software package has features that will assist checking and debugging for every scenario. Even in the software, default settings for error checking tend to be conservative, so the designer needs to have a solid understanding of the design process in order to ensure everything right.

Connectivity - Different Models can Influence how you Approach your Design

The strategy that a designer may take when approaching designs with varying connectivity models can vary greatly depending on the type of design being produced. Designers who engineer more simple flat designs may adopt an approach that works well for a flat design, but would be extremely difficult and the complete opposite of what a designer would use in a complex design that uses hierarchy.

To understand why this is the case, it's important to point out an often overlooked and subtle point - scale and size of a design will determine how it is represented and modeled, and will often dictate the best ways for design verification.
Flat designs work well for a smaller design, where you can visualize the entire design as a single sheet that someone has cut into sub-sheets with scissors. But once a design becomes complex and goes past say 6 sheets, it becomes very hard to 'read' (understand) a flat design without a structural view available for reference.
In the age of modern software, it's still a common practice to draw and check the schematic in print for verification as it does not matter then how the schematic was implemented in the software. Assuming a designer is working off a printed schematic to debug a design, it could be argued that it is easier when a design is hierarchical because any net leaving a sheet only goes up to the parent sheet, not across to ports on any number of other sheets.

Wiring Errors

Schematic wiring problems are always hard to find. Mistakes like the wrong pin being wired, or a net being incorrectly named are some of the more common and difficult ones to find. A major factor in this is a very human one. Often there are numerous error messages when checking the design. Some might be relevant and some might not be. But the overflow of information causes the designer to switch off mentally, and even be willing to live with a certain number of warnings. Often this leads to a disabled error report that has no verified meaning or importance - somewhat defeating the purpose of why the designer started the check in the first place. It's better to have an accept/reject procedure for certain errors at the very minimum so that there is a starting baseline for determining quality.

In Altium Designer, it is possible to detect unconnected pins, off-grid wires and badly wired power ports to name just a few by compiling a schematic project. Options for these violations and more can be seen under the section Violations Associated with Nets as shown above in Figure 7.
In the Project » Project Options, click on the Error Reporting tab to view the errors/warnings which can be generated when compiling the schematic. You can customize the compiler options through Tools » Preferences to have hints showing on the schematic (squiggly lines).

Hover over the warning/error marker and get more detail on the violation. Violations associated with Components can also be used in conjunction to detect incorrectly wired component pins. The Navigator panel will also help you solve schematic wiring problems to narrow down which pins are associated with a net for instance.
Net names can be checked as well in the Navigator panel. First, click on the flattened hierarchy at the top (this means that the panel is showing the components and nets for the entire design), then you can click in the list of nets and use the Up/Down arrows to move through the list as shown in Figure 8.

This is an excellent way to find net name typos. In the Reports menu, there is also a Single Pin Net Report, handy for finding named single pin nets (although it will not detect single pin nets that do not have a net label).
Sometimes a wiring problem itself may lie simply in the difference between the way a convention is modeled in the software and the convention it may have in real life. Because software in general is almost always adapted to suit the widest range of customer needs possible, so it may fall short in specific needs a designer may have.
A Case Study: reviewing bus names
A good example of this is obvious when it comes to buses. A bus can not be formed by net names like (CLK, D0, D1, RST) so a designer may end up with a bus called UTIL0..4. This makes the reviewer's and the designer's task much more complicated and error- prone because now the schematic is more difficult to read! But a correct schematic produces a correct PCB, so it is crucial that this step is not neglected (even if it is really boring to review).
In Altium Designer, the Schematic editor does have error reporting violations associated with buses that can helpful, these are available from the same Error Reporting tab in Project Options.

Flat Designs

Some designers rarely encounter hierarchical designs in their day to day work - it just does not fit the type of designs that they do. For such simpler designs, using ports as much as possible combined with a divide and conquer approach can be successfully implemented. By using ports more, a designer can build blocks of schematics which make it extremely easy to verify and debug connectivity, especially when done in conjunction with highlighting and ERC.
A Case Study: commercial laser products

In a particular research and development department for a company that develops laser precision machinery, the engineers reuse modified and reviewed circuitry to suit new development easily, and speed up the verification process. They work in a way where the circuitry needs to be modular, and wired to the rest of the design. Copy and paste are used extensively to save time by inserting the circuitry into the design, but the time taken to rewire circuitry following a paste is equally a labor-intensive and manual process.

These are the typical requirements where connectivity throughout the design takes place with ports and net labels. But this type of design easily allows reusable circuitry to be added and removed, simply by adding and removing a portion or entire schematic from the design and it still working as intended.

Hierarchical Designs

Hierarchical design is one of the outstanding strengths of Altium Designer, allowing you to structure your design in a logical and meaningful fashion. Altium Designer's hierarchical design capabilities are not just for structuring the design though, they are also the backbone of the multi-channel design capabilities, and also make it very easy to reuse a section of circuitry in different electronic product designs.
As a hierarchical design becomes inherently more complex and potentially difficult to review, any potential downsides can be offset by other benefits to using it.
For example, the design becomes readable to a designer because the structure is shown, connectivity is only from parent to sub-sheet and not to any number of other sheets, and net labels are always only local. This also works just as well for design reuse (as in Snippets, which are discussed shortly).

A Case Study:mission-critical applications
Using a more mission-critical application as an example of the other end of the design spectrum, the design cycle can vary greatly and have extensive checks in it compared to many commercial applications. It's not uncommon for the design philosophy to be decided by the customer. In such a process, there may be a breadboard/design concept phase of prototyping which can last a year or more. During this phase the focus is heavily on the schematic although breadboards are designed as a proof of concept. After which, an evaluation model is developed that uses commercial components as much as possible to save money and time.

It is created, however, as electrically equivalent to the real model as possible. Then a qualification model is built that is identical to the real model. The real and qualification model can be produced at the same time. The qualification model is tested to verify that the product conforms to whatever it may be exposed to without failure (for example, temperature, shock, vibration, radiation etc.). The total design time can range from a few years to many years.
It is common in this case study to actually limit the usage of different connectivity models so that every designer is using the same model. It is, however, relevant to the reviewer that the connectivity model is understood and verified.

Design Reuse

Creating and storing verified circuitry is a necessity in this environment to quickly build-up resources of proven designs that can be used at any time. They need to be readily accessible to save time without having to search through folders on the hard drive and open individual schematics to find what is needed, or verify that it works. Sharing proven designs means the team can have resources at their fingertips without the effort involved in researching a solution to see that someone else has already come across it.
Essentially getting a new technological design to market means having to quickly reuse proven modular sections of designs and integrate them with new development. This objective eliminates much of the hard work, and allows the engineers to develop and fine tune the real improvements, rather than spend considerable time on locating, rewiring, and verifying circuitry.
It's worth commenting that design reuse is so much easier in complex designs when hierarchy is used, because a chunk of the design is saved as an actual schematic, and then can be reused without the need for copy and paste!
Another handy feature is the ability to paste the selected circuitry as a graphic. Using this you can easily include a graphic of section of circuit on another sheet, and size it as required. Select Edit » Smart Paste to transform the clipboard objects as you paste them.

Design Snippets - Easy Reuse of Existing Designs

When a design includes sections of circuitry used in other designs then a designer can also make good use of the design Snippets feature. A simple and easy to use feature, the Snippets system lets you save any selection of circuitry on a single schematic sheet, or any selection of a PCB design, including the components and the routing.

Schematic and PCB selections are saved as snippets in the Snippets panel, right-click in the panel to add the current selection as a snippet.
Snippets can be organized into standard Windows folders on your network, click the Snippets Folders button to add an existing folder to the list of available folders in the Snippets panel. Each snippet is stored in a standard schematic or PCB file.

Design reuse - Parametric Hierarchical Design

The challenge with reusing a section of design, for example pointing from a sheet symbol on your current project to your company's preferred power supply schematic, is that the values of the components are not always fixed from one design to the next. The Altium Designer feature for parametric hierarchical design solves this - it allows you to move the specification of the component values from the schematic sheet, into the sheet symbol that references that sheet. This capability also works in perfectly with multi-channel design (designs where the same section of circuitry is repeated), allowing you to have different component values in each channel.
Parametric components are defined by declaring their value as a parameter of the sheet symbol above, and then referencing that parameter on the target component.

For example, a graphic equalizer can have the same circuit repeated many times, with the only difference between each channel being the component values. So a capacitor might take the values 0.12μF, 0.056μF, and 0.033μF in the different channels. Implementing this in Altium Designer is simple since you can specify these values in the sheet symbol referencing each channel, eliminating the need to have many similar schematics with only component values being different.
Parametric hierarchy is not limited to component values, you can parametrically reference any component parameter or any text label on the schematic sheet. A designer can refer to parameters from a symbol that is many sheets up in the hierarchy, the system will search the hierarchy until it finds the matching parameter.
In Altium Designer, the Net Identifier Scope in the Options tab of Project » Options can also be used as a check as the entire schematics hierarchical model is the same for all boards (in this case when one is different, it is easier to see). But unlike the case of flat designs, things become more complex to review when there are local nets, or design objects (like power ports) have been changed to become local. It can be very difficult to follow the design and understand how the connectivity is built in such cases.

Bill of Materials Information

The Bill of Materials (BOM) often becomes a valuable tool for verifying a design, but even how this is used can vary greatly between companies. Different companies use different systems, and there is no standard for how to approach verification using the BOM.
A larger company for example may compare and check the BOM together with the schematic. There may even be different designers checking different parts of the design, so one needs to think ahead and plan about what to provide and who will check what. This might even be complicated by the software that a company is using!
In an integrated package like Altium Designer, the schematic and PCB editors will share the same part information, and there is no difference or issue to use either one or the other to generate a BOM. But, if a company uses a different package for the schematic from the PCB design phases, they may not be able to rely upon this. Another example yet would be in the case of a software package that is integrated but still separated enough that a separate BOM must be generated from both the schematic capture program and the PCB layout side.

To further complicate this, every company has their own database for identifying, listing, and ordering their parts. Even if they all use a BOM as a means of listing the parts they have for verification or other activities, there's a good chance they will all be using it in a slightly different way.

A Case Study: different ways that BOM are used

An example of this would be a company that used a 4-digit number to identify the parts but had a database program that used 8-digit numbers to represent them. The 4-digit number was manually entered into the database which then automatically generated the BOM file with the rest of the numbers which weren't really needed for the design check and so complicated things.
Another company used 9-digit numbers to identify and store their parts, information from a BOM, and also worked in conjunction with a purchasing department who used their own data as well. The purchasing department required all the information a certain way so that they could then order the parts. So the designers would have to provide the manufacturer and the part number as minimum. They would also add a link to the datasheet, price, description, and value. This could be a simple spreadsheet file.
In some companies and with certain software packages things may not be so graceful to integrate completely as so much diligence is required on the part of the reviewer/designer to make sure they fully understand the systems in place that they are working with.
Altium Designer allows you to include database data directly into a BOM (for example if you did not want to include the preferred supplier information in the schematic but require it in the BOM as noted in the example below). The Report Manager also includes a number of example templates, making it easier to use and deliver the output you need for any review.

Back Annotation

Even the best laid plans can't foresee everything that will happen. Designers are certain to do changes, and PCB designers will often change the PCB manually and then have to back annotate the changes to schematic. All of these changes will need to be handled, tracked and verified back in the schematic.
Why do designers have to do backwards annotation? The most common changes on the PCB can include the following reasons:

Designators Update when the Board is Reannotated Positionally

In the case of changes made to the designators when the board is reannotated positionally, the Synchronizer uses the component unique IDs to detect changes made to the component designator on the PCB and reflect those changes back to the schematic. This is actioned from the Design menu in PCB allowing you to choose the Schematic project. The component designator on the PCB is then compared to that on the schematic and any updates to be made are generated, reviewed in the Engineering Change Order (ECO) list and executed.

Component Footprints Update when the Designer Needs to use a Smaller One Because of Space Limitations

There are two ways in Altium Designer to change a component footprint when the designer needs to use a smaller space because of space limitations: 1) changing it through the Component Property browser in PCB; or 2) placing it from a library onto the PCB where net connections are lost.
Assuming the first method is performed, again, you will select to Update from the Design menu. Changes to footprints are pushed back to the schematic. The source library detail will not be pushed back to the schematic although you are able to push library file details from the schematic to PCB.

Component Values when either a Mistake is Detected, or a Value is Left Empty Initially then Decided on when the Board Design is Underway

Component values are stored in the Comment field for a component (Schematic and PCB). Differences in comment property values are detected in PCB and pushed to the Schematic, from the Design menu. Same goes for pushing component values from Schematic to PCB.

Net List Changes due to Pin Swapping

Net list changes from the schematic to the PCB are very straight forward in Altium Designer using the Design » *Update menu. It analyzes the net list connectivity and compares it to the net list on the PCB. If there are any differences, it creates an ECO to update or create new nets to be updated on the PCB component pads (Figure 12). Net name changes can be detected where the Synchronizer attempts to match the different names by the pins associated in the net. Net changes made on the PCB that are not pin swaps can not be applied automatically to the schematic design by the update process, these need to be done by the designer.

All of these changes are handled easily by Altium Designer's Synchronization feature. The Synchronizer uses component-unique IDs to identify the association between a footprint on a PCB and the relevant part on a Schematic. In this way it relies on the unique ID to proceed and compare properties between the models of a component; footprint, and part.

Summing Up

So in conclusion, the best strategy for design checking and verification includes the following:
Making sure your parts are correct.Have a verification strategy up front, and sticking to it.Understanding what your software package is capable of doing, learning how the schematic checking features work, and then adjusting to your design and using it.Choose a design structure that suits the design size/structure.Reuse design info where possible.