Tracking Down Broken Nets

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Modified by Admin on Nov 6, 2013

When a net is not completely routed, it is reported as a violation of the applicable Unrouted Net rule. The net is considered to be broken. The violation details for such a net will show how many sub-nets the net is broken into and the percentage of the net that is currently routed. Broken into two sub-nets indicates one break, broken into three sub-nets indicates two breaks, etc.A break, or rather an unrouted connection, can be quickly found using the PCB panel. You could of course cross probe from the relevant violation message in the Messages panel, but by using the PCB panel, you can take advantage of the masking feature. To highlight the break, follow these steps:

Configure the PCB panel in Rules mode
In the Rule Classes region of the panel, click on the Un-Routed Net Constraint entry
Click on the required entry in the Violations region of the panel. Filtering will be applied using the associated net as the basis for filtering. Ensure that the Mask or Dim option at the top of the panel is enabled. In the workspace, only the violating net will be displayed with all other objects masked or dimmed out. Click the Mask Level button at the bottom right of the main design window and use the controls to increase the masking or dimming levels of contrast as required

To highlight just the unrouted connection, double-click on the violation entry in the panel and use the Jump button in the Violation Details dialog that appears

{Note} Turn the Online DRC feature on when manually routing to immediately highlight clearance, width and parallel segment violations. Disabling a rule has the same effect as deleting the rule in terms of how it is handled by the Online and Batch DRC. All currently displayed DRC error markers can be cleared from the document using the {*}Reset Error Markers{*} command, available from the main {*}Tools{*} menu. Clearing the error markers also clears the violations reported in the {*}PCB{*} panel. The violation messages that appear in the {*}Messages{*} panel after running a Batch DRC, will remain however.Bear in mind that this command just clears the error markers, it does not fix the violations. If you run a Batch DRC again, all violations will reappear in the PCB panel, along with the error markers in the workspace. With respect to Batch DRC of signal integrity design rules: * you must include a Layer Stack rule to be able to perform a signal integrity analysis * for the design analysis to be correct you need to include appropriate Supply Nets design rules * The DRC tests are worst-case. Each net is simulated from all possible output pins and the worst result is displayed. {Note}

With the winter 09 release of Altium Designer, refer to Improved Rule - Broken Net Constraint for details on Design Rule Check reporting and visual improvements made to broken nets.