Release notes for Altium Designer 10 (Platform Build 10.391.22084)
Additional Resources
Date: 24 February 2011
Releae notes for:
PCB
50 | The memory utilization of Altium Designer has been improved by separating the generation of visual meshes of STEP models into a separate system process. |
87 | Mechanical Layers beyond 16 are now displayed in the Update From Libraries comparison list |
185 | Examples folder has been moved out of the Program Files folder to prevent security issues in Vista and Windows 7 |
192 | Fixed typo in Messages panel for Testpoint Rule message |
261 | The behaviour of "Jump to Component" dialog has been fixed. Now the entries in the components list are no longer truncated to 18 chars. The dialog title was also changed to "Placed Components". |
272 | Saving a PCB document to ASCII will no longer strip out the embedded board objects |
278 | Only relevant files are opened in CAMtastic® after creating a Testpoint Report from PCB |
287 | Altium Designer STEP model functions are no longer affected by a small number of third party STEP viewer applications. |
364 | Minimum Mask Sliver DRC errors will now be correctly generated for pads rotated 90 or 270 degrees. |
372 | Rule Wizard dialog has been updated. Now the text fields on 1st & last page are no longer editable. The caption at the top of each page is no longer cropped & the dialog is now no longer sizable so the picture at the top will not disappear anymore. |
396 | Selecting and dragging of tabs in a SimView Wave document now works correctly when there are many tabs and the first is not visible. |
428 | Problem parsing Spice resistor temperature coefficients was fixed. |
435 | Starved Thermals DRC error check has been improved. No fake DRC errors will be generated anymore for available copper area less than 50% from the ideal copper area. |
454 | The "Set Snap Grid" dialog can now toggle units |
474 | The Export to PCB command has been improved. Now any existing split planes within enclosed polylines will be correctly exported to PCB |
504 | Gerber files for Mechanical Layers 17 to 32 will now import into PCB through the File>Import menu |
524 | The use of Panelization option when generating Gerber output has been corrected. Now the selected layers will be correctly panelized & the generated Gerber files will be loaded in CAMtastic® if auto-load option is turned on. |
541 | The ODB++ Output generation has been improved. Now the generated directory structure will be zipped into one file that can be added to version control more easily & the .svn folder will not be removed anymore.. |
553 | Object Class Explorer has been improved. The Add Selection command no longer selects an extra item in the list. Also the speed with which the lists are populated has been improved as well. |
555 | PCB Preferences>Board Insight Display page - Font Name and Style now update correctly in DirectX mode |
567 | The Edit Rule Priorities dialog for PCB Rules can now be resized. |
665 | Pressing SpaceBar will no longer reset the HUD delta origin while in interactive processes |
718 | When repositioning components an warning will be shown if any of the components is locked. |
727 | The reference point for placing and dragging 3D bodies will now be their origin |
728 | Adding snap points during initial placement of 3D bodies will now work |
741 | In certain situations, dimensions were lost when saving a PCB to ASCII. This no longer occurs. |
770 | In DirectX mode, hitting END will now flush video memory |
815 | The modified status of "DRC Violations Display" page will now be reset after applying the changes |
825 | Rooms will now snap to each other as they did prior to S09. |
826 | The internal split planes imported from 99SE will no longer miss their nets. |
828 | When alignment tools are used to align component text, only the text is aligned now instead of the whole component. |
887 | The support for PCB Mechanical Layers 17 to 32 has been improved in the Scripting System. |
902 | ODB++ output EDA/data sub net (SNT) records will now contain lines for linking the drill features with the sub net records. These lines have the format "FID H Layer# Feature#". |
905 | the reference scripts have been updated to include support Mechanical Layers 17 - 32 where appropriate. |
906 | The MaxMin Width Constraint has been improved. Now the constraint will also check nets that have only pads & vias on the current layer being checked. |
914 | Access Violations no longer occur when trying to explode STEP models. |
955 | Routing in 45/90deg Arc mode no longer starts the next un-committed arc from the start point of the previous arc instead of the end point. |
1012 | Adding teardrops to pads and vias no longer requires a longer track length than in version AD6.9. |
1121 | Teardrop Options Dialog now reads the correctly with regards to Pads and Vias being teardropped. |
1374 | When editing the edges of polygons and regions floating panels will now go transparent as the cursor moves nearby, as is the convention when interacting with the PCB. |
1385 | The interactive route tool was not properly auto-terminating when clicking over a same net object if the electrical grid was off. |
1386 | The converted .Designator special string is no longer locked until the corresponding component or designator are moved. |
1387 | Fixed the interactive route tool to not leave overlapping tracks when starting a route from a track but not at the track's endpoint. Additionally, the tracks may not have been combined into a single track if the tracks are parallel. |
1388 | The speed of split planes rebuild & loading has been improved between 2 & 4 times compared with S09. The speed of split planes editing has been improved between 10 & 20 times compared with S09. |
1389 | Improved the SMD pad entry tracks in the interactive route tool. |
1390 | Imported Protel Version 2.7 and 2.8 designs did not use the correct pad stack layer sizes and shape when pads were specifically bottom layer SMT pads. This issue has been resolved. |
1391 | After modifying a plane layer by double-clicking on its layer tab, the plane did not always properly update. This modification now operates more consistently with modifications completed using the Layer Stack Manager. |
1392 | The Interactive Routing Options form had an incorrect text of "Push Modes" next to the "Follow Mouse Trail" label. Follow Mouse Trail works with Walkaround Conflicting Objects as well. |
1393 | Now "Copy Room Formats" will copy any copper pour polygons solid or hatched when "Enclosed & Touching Objects" options is set. Also there will no longer be a crash when hatched polygons are copied this way. |
1394 | When modifying properties of either a Fabrication or Assembly Testpoint Style rule, the Allowed Side Top/Bottom checkbox options can now be successfully used to constrain the testpoint board side. |
1395 | The interactive Multiroute and Diff Pair tools would sometimes not use the existing track width when the option "Pickup track width from existing Routes" was checked. |
1396 | Remove the 'Background' layer from the layers dialog that erroneously appeared in the Winter 09 release. |
1397 | Short/Medium/Long Display name setting for the layer tabs is now remembered between Altium Designer sessions. |
1398 | IPC-D-356A testpoint reports were not including assigned testpoints for proper generation of testpoint (099) records in the output file. This has been corrected. |
1399 | After setting a Solder Mask Expansion rule's scope as OnBottomSolderMask, Altium Designer could produce a fault followed by an abnormal termination. This issue has been corrected. |
1400 | Added support for Loop Removal in Interactive Diff Pair and Multi-route tools |
1401 | A bug has been fixed whereby pads containing non zero hole rotations or non zero Offsets were incorrectly mirrored. |
1402 | A new Coordinate Positions option has been added to Testpoint Report Setup. The new option allows all testpoint report formats (including IPC-D-356A) to be exported relative to the absolute board origin or the current board origin. |
1403 | Routed net lengths and manhattan lengths greater than ~214750mil (5454 mm) are no longer displayed as negative lengths. |
1404 | Now the Net Antenna violations will update when a component is moved if needed. |
1405 | Improved glossing of diff pair tracks so that tracks in the diff pair are not moved such that a larger gap than specified by the rule is not created. |
1406 | Apostrophe's are now included in the Query Helper results for objects with a name specifier. |
1408 | Added "Allow Via Pushing" option to interactive route tool. |
1409 | All testpoint report types now support embedded board arrays. Multiple IPC-D-356A netlist files are produced when exported from a PCB document that contains multiple embedded board arrays. |
1410 | A problem in the layer stack manager has been fixed whereby it was incorrectly adding a MidLayer31 to the layer stack. |
1411 | SMD To Plane Rule has been improved. Now the distance between the SMD pad & the closest via is correctly calculated. Now the rule takes into account only the vias that connect to a split plane that has the same net as the SMD pad. |
1412 | Changing Designator/Comment properties no longer very slow if the PCB Document contains hatched polygons. |
1413 | Fixed a case in the Interactive Route Tool when the route mode is HugNPush and attempting to hug two traces that form a convex corner would sometimes cause a small, incorrect push of one of the traces. |
1414 | The display of BarCode text for special strings has been rectified. Now the text will appear underneath the barcode always. |
1415 | Testpoint DRC should now give correct results for vias with varying sizes through the via stack |
1416 | When viewed in 3D pad holes that are larger than the pad copper cut into the solder mask. |
1417 | Now Net Antenna Rule will no longer create bogus violations for small tracks of different widths. |
1418 | "Copy Room Formats" command no longer duplicates polygons. |
1419 | Accessing and using the Favorite Interactive Routing Via Sizes dialog through system preferences with no PCB design currently open could cause a system fault in Altium Designer. This issue has been corrected. |
1420 | Crash when enabling layers caused by coordinate object that lost its text member no longer occurs. |
1421 | All via stack layer sizes are now preserved when saving even if the layers don't exist on the PCB |
1422 | After choosing via sizes during interactive routing, the tool would sometimes place a via that respects the selected hole size, but not the other via size features. This issue has been resolved. |
1423 | When an ASCII PcbDoc that contains split planes was loaded into the PCB Editor, the split planes were not retaining their individual net assignments. This issue has been resolved. |
1424 | Fixed cases where a via could not be pushed when clearly there are not obstacles in the way. |
1425 | Right Reading, Autopositioning and Text Justification have been improved for imported P-CAD PCB designs |
1426 | Saving a PCB document in ASCII 2.8 format no longer changes the SMD Rounded Rectangular pads placed on Bottom Layer in the Original File to Rectangular pads. |
1427 | Improved the Interactive Routing "Follow Mouse Trail" mode so that the tracks stay in the user indicated path when going around an obstacle and do not "jump" over that obstacle. |
1428 | Use of Design Rule Checker dialog was marking PCB design document as out-of-date, regardless of whether any design data was modified. This has been corrected. |
1429 | Now any pads/vias that touch will also be considered connected so they will appear in the Gerber/ODB++ output even if the "Include unconnected MidLayer pads" option is not checked. |
1430 | In the interactive route tool, improve the results when routing between vias so that one of the vias is pushed rather than moving the route to the outside of the vias. |
1431 | Added 2 new Condition Types to Query Builder: "In Any Polygon" - targets the member objects of any polygon in board (translates to InPolygon) & "Belongs to Polygon" - targets the member objects of a named polygon (translates to InNamedPolygon('Poly Name') |
1432 | Clearance Rules are now ignored for objects that are members of the same Differential Pair. Instead of using Clearance Rules for such objects, the Differential Pairs Routing Rule's Min Gap value is used to constrain differential pair object clearances. |
1433 | Fixed the interactive router so that after using the "Swap To Opposite Route Point" (shortcut of '9') and terminating the route, the route object (via, track, or arc) added before the "swap" command is not left in a locked state. |
1434 | SMD NeckDown Rule has been improved. Now this rule will check only the SMD pads instead of all pads. |
1435 | Fixed the Multi-route tool and Diff-pair tool used with obstacle avoidance set to Stop At First Obstacle mode to not cause violations. |
1437 | When using InFromTo( ) in Query Helper, a selection of existing FromTo specifiers should auto popup for selection, but the popup is absent. The popup behavior for FromTo selection has been fixed. |
1457 | Now CAMtastic® NC Rout loader will correctly import rout paths containing counter clockwise arcs. Also the correct cutter compensation will be used even if not specified in the tool selection command. |
1458 | Polygon definitions that do not fully follow the Gerber standard (e.g. G36 definitions followed by G54 aperture selection command) will now be correctly loaded in CAMtastic®. |
1459 | The CAMtastic® Gerber loader has been improved. Now the loader will be able to load malformed polyline aperture macro definitions that have less points defined then the count specified in the macro definition. |
1460 | The NC drill export of embedded board arrays have been improved. Now any mirrored embedded board arrays containing blind/buried vias will be correctly exported. |
1462 | An AV no longer occurs if IKF is not specified in a PSpice diode model. |
1485 | When running the Design->Make PCB Library command component bodies that contained STEP models would be misplaced in the pcblib. This issue is now resolved. |
1517 | Cycling through signal layers will now work correctly. If the next layer is an Internal Plane layer then the next signal layer will be made current. |
1622 | The right click menu command "Wrap Rectangular Room Around Components" will now work on all selected rooms. |
1636 | Fixed issue when copy and pasting a mirrored embedded board array whereby it would unmirror |
1638 | A bug has been resolved whereby the mask shown in the "PCB Library Navigator" panel for pcblib's would incorrect display '*' despite the list of components been filtered by an active mask. |
1663 | The PCB Navigator, Rules & Violations & 3D Models panels "Mask" mode with selection has been fixed. Now the selection no longer persist when turned OFF & the panel mode is set to "Mask" |
1679 | The PCB Panel and PCB Library Panel have been improved so that they now use the user defined layer names. |
1684 | Correct file extension used when saving STEP files under Windows Vista and Windows 7, thus preventing overwriting original PcbDoc file |
1689 | The density map now works in DirectX |
1692 | Improved show up time for Pop-up ambiguity resolution menu on large designs |
1696 | Now the lengthy delays seen when moving text caused by unnecessary update of power plane connections has been corrected |
1708 | Floating Panels blending has been fixed for interactive routing |
1709 | In the PCB Library editor, use of the FSO now has the Whole Library option unchecked by default. |
1720 | Export to SiSoft Files option has been added to the file types available in the PCB save as dialog. |
1737 | Improved show up time for Layers/View Configuration dialog on large PCB designs |
1742 | Improved cursor hit testing performance on large designs |
1790 | Favorite interactive routing sizes now has fields which will update correctly by clicking the OK button without having to change fields first. |
1797 | Export Ansoft Neutral File (*.anf) was added as an option to the PCB file Save As dialog. |
1806 | Reimplemented glossing of connected tracks when via is dragged. |
1807 | Fixed a long startup delay in the Interactive Router. The delay could occur if shorts to large nets existed in the design, typically caused by out-of-date flooded copper pours. |
1813 | When the reference location for a component in a PCB library editor is changed and the library subsequently saved a redraw issue occurred whereby the component would appear to jump around. This issue has been fixed. |
1814 | The PCB Layer Sets will now be updated after Update from Libraries |
1818 | Erroneous "Isolated Copper" DRC errors that were produced on boards with internal planes have been fixed. |
1824 | Hitting ESC now works to cancel the Applicable Rules dialog. |
1828 | In the PCB Panel, the zoom level popup dialog now stays within the screen |
1831 | Unit suffixes have been removed from values in the PCB Panel and PCB List and now appear in the column title where appropriate. |
1849 | The solder mask now updates after modifying the board outline in 3D |
1876 | The "Import" sub-menu in PCB library will no longer be visible if empty (no commands associated with it) |
1898 | Fixed crash in diff pair length tuning process, when tuning code could not find solution |
1917 | CAMtastic® Export 2 PCB process no longer creates extra multilayer pad in origin |
1932 | Now component/net classes will Undo/Redo correctly after ECO |
1974 | Exported boards as step now are positioned in external step programs at (x=0,y=0,z=0). Solder Masks are now taken into account upon export |
2013 | Delays after zooming or panning large PCB designs have been removed |
2035 | SimView print now uses the scale values specified in the plots. |
2042 | Allowed for Copy/Paste and Place in 3D mode |
2049 | There is a new anti-aliasing option to allow higher quality 3D outjobs and views |
2051 | In 2D DirectX, pads with square or slot holes will now display their internal plane connection relief patterns properly |
2064 | Copy and Pasting a Footprint in the PCB editor will no longer create duplicated UniqueID's |
2073 | Pads placed on silkscreen layers will now appear in 3D |
2081 | Textures on locked objects now works and obeys the chosen preferences |
2094 | The behaviour of copy and pasting primitives that belong to unions had been changed so that the newly pasted primitives are not added to the existing union. |
2107 | CAMtastic® printing has been corrected. Now will print the header text on each page instead of only on the 1st one |
2109 | Now Pad/Via relief patterns will change to draft drawing when in Draft mode. |
2158 | Make user selection persistent (store No net Objects/Locked Objects flags) during an AD session & also show this dialog always only if the user choose to do so |
2199 | Now BGA Escape Route will follow the width rule as expected |
2204 | Move/Rotation of embedded board now respects input point location, instead of rotating about embedded board origin. |
2215 | The speed of the "Update selected components from PCB libraries" command has been improved. |
2217 | The speed of Polygon editing for polygons with large number of vertices has been improved, now the process is on average ~100 times faster then before |
2222 | TrueType text now displays the letters that have voids in them correctly |
2223 | Now the rounded rectangular pads mask corner radius will be calculated using the full mask expansion instead of a percentage of it |
2239 | Improved memory usage by solid polygon and polyregions by factor of 2 |
2272 | Any changes made to "Board Insight Color Overrides" properties page will now be applied & the page will no longer be marked dirty |
2273 | "Make PCB Library" command will copy all text properties including the TrueType Text & BarCode text ones |
2275 | Measure Primitives now additionally reports the "corresponding layer distance" when it is different from the "flattened layer distance" |
2299 | The "Measure Primitives" now works with polygons. |
2366 | Changing the pattern or zoom-out behaviour of DRC violation overlays no longer needs to rebuild the scene |
2395 | In 3D, the transparent side walls of board cutouts will now always display properly, objects within cutouts will now be visible, and flying the camera into a cutout will not glitch. |
2413 | The Layer tab right click menu now correctly shows whether the board is flipped. |
2435 | The "File in Previous Format" warning report no longer gets added to the wrong project. |
2447 | Hatched polygon repour no longer includes overlapping copper |
2458 | The Ibis converter has been updated with version 5.0.3 of the ibis golden parser |
2467 | Improved detection of starved thermals when multiple disconnected copper islands are present on internal plane |
2475 | Now the Routing Width set through Diff/Multi-route TAB key dialog will be used similar with the single trace router |
2477 | Routing Cross Hair no longer disappears when exiting nested processes & returning back to routing |
2488 | Hitting ESC now Cancels the "Object Class Explorer" dialog |
2489 | Changed the arc handle modification so that the start and end points remained fixed. The original mode, whereby the start and end points would move, is accessible by holding down the ctrl key. |
2495 | Grids will no longer become dimmed or masked |
2550 | The shadow will longer flicker on the first frame or after rebuilding the scene |
2629 | The PCB List/Object Inspector "Objects to Display" pop-up will no longer truncate the objects kind list on Windows 7 with Medium Fonts. |
2652 | CAMtastic® Gerber loader has been improved. Now 3rd party Gerbers containing polygon definitions will be correctly imported. |
2673 | Fixed possible lockup in Interactive Router during push operations and a specific track geometry. |
2674 | Loop Removal for the Interactive Routers now works when routing across an open circuit and removes any leftover stub. |
2683 | Small tracks within vias can now be dragged. |
2684 | Loop removal of the Interactive Router no longer incorrectly removes a via when routing to that via. |
2688 | Board Level Libraries for Actel SmartFusion devices are now available. |
2694 | An issue has been resolved whereby the footprint selected in the pcb library list would not match the visible footprint in the PcbLib editor immediately after running the IPC® Compliant Footprint Wizard. |
2699 | The Polygon Manager will now recognize that a change to the Pour Order requires a repour of affected polygons. |
2721 | Fixed Interactive Router to not potentially leave a stub track behind when in lookahead mode. The stub track was left if the user left-button clicked to commit a route, then immediately right-clicked to quit the route without moving the mouse. |
2724 | A small pause after saving PCB documents has been improved. The pause was caused by the generation of the PCB document preview used by the design insight feature. The generation of the preview has been optimized and is now 50% faster. |
2763 | A crash should no longer occur while running Batch DRC if the user clicks in the "PCB Rules and Violations" panel |
2771 | The Make PCB Library command from PCB Editor now more precisely replicates component pad shapes and sizes when the padstack mode is set as Top-Middle-Bottom or Full Stack. |
2772 | PCB FSO will no longer throw an error when "Lock Strings" attribute value is changed & the filter applied |
2782 | Un-routed net violations will display the net name in violations panel & the violating primitives will display fully when zooming into the violation from violations panel |
2784 | The Temporary Mesh Data in the preferences->pcb->models is now created if it does not exist on the disk. |
2785 | ODB++ no longer fails to generate output from a PCB document when the pad shape information is incorrect because the pad shape size is 0, e.g. Mounting Holes where only the Holes Size is defined. |
2788 | Unplated pads are now correctly reported by Unrouted Net (a.k.a. Broken Net) rule when internal planes are present on the board. |
2803 | Make PCB Library command now auto-adds created PCB Library to PCB project, when appropriate. |
2807 | The "Wrap room around component" family of commands now work when the rule that a room targets is not enabled in the rules dialog. |
2808 | An issue was fixed when panning the PCB editor view with the SpaceNavigator device. If the mouse cursor was positioned over the horizontal scroll bar in the PCB editor the pan direction was previously incorrect. |
2824 | Place String command no longer fails if the mouse position doesn't change and the old/new text x1,y1,x2,y2 are the same. |
2835 | PCB ASCII format loader will now import Top/Mid/Bottom stack pads correctly |
2866 | If the folder defined for Temporary Mesh Data in preferences is not writable, a message is now displayed in the Messages Panel. |
2873 | Now the Default Primitives Layer will be able to be selected from all possible layers for that specific primitive |
2881 | PCB Editor's Teardrop tool now creates teardrops for routed arcs that connect to pads and vias. |
2907 | The multi-route tool no longer leaves a no-net start object in a state that can cause a crash. |
2922 | "Deselect / Inside Area" command will now deselect the board outline if it was selected |
2926 | Designator / Comment Locked flags are again working as expected in PCB Inspector & PCB List panels. |
2934 | The pad selection display in the component preview in "Configure Pin Swapping For Component in Project" dialog will no longer be obscured by the masked component bodies |
2938 | An Access Violation will no longer occur in "Pin Swapper" dialog when grouping the rows of the "Pin Swapping" grid by "Pin Group", selecting some of the rows & then click on the component preview window |
2985 | The short-cuts list shown by pressing F1 key while in any of the interactive processes will no longer include the menu item separators (SEPn). |
2999 | Query Helper and Query Builder now consistently enclose all name strings that users select from hint helper popup menus in single-quotes. |
3015 | Solid regions will now dynamically pick up nets as they are placed. |
3021 | Changing the Text Height when using "Place Text" command will now take effect immediately. |
3028 | The Interactive Router no longer potentially leaves a track in a locked state after a push. |
3074 | "Layer Stack Manager" layer stack kind drop down box is no longer editable if focused. |
3075 | An AV no longer occurs when exporting a PCB document to Specctra CCT in Windows Vista - Windows 7 if the user doesn't have Administrator rights. |
3095 | "Explode Polygon to Free Primitives" command (for Solid Polygons) no longer creates polygon regions that are not editable & could disappear when the PCB document is saved. |
3100 | Dragging Track End with "Preserve Angle When Dragging" option ON will no longer remove the dragged track if its length is <= than the track width. |
3108 | SMD to Corner Rule no longer creates bogus violations if multiple tracks intersect inside the SMD pad |
3109 | The PCB library Panel components filter (Mask combo-box) has been improved. Now the wild card |
3116 | Gerber Output for drill symbols on Drill Drawing Layers no longer uses very big apertures that can make the user believe that there is some error or randomness in the Output. |
3139 | The View configurations editor Apply button will now update Color changes as expected. |
3166 | The crash that used to occur when running Acute Angle DRC rule for designs containing big hatched polygons has been fixed. |
3197 | Improve the auto-picking of the neighboring differential-pair primitive in the Advanced Differential Pair route tool. |
3214 | The loop removal logic of the Interactive Router no longer removes a necessary short track that is completely inside a via or pad. |
3215 | The loop removal of the Interactive Router no longer removes regions. |
3250 | The Interactive Routers no longer treats polygon pour outline objects (from an unfilled polygon pour) as obstacles. This was causing vias to be pushed potentially much larger distances than necessary. |
3281 | Interactive route now avoids net cleanup step when no routes have been committed. |
3337 | The default maximum font size for net names has been increased from 20 to 40 |
3343 | Default setting for polygons are now applied to polygons created from primitives as they are changed from outline to Solid. |
3381 | PCB Editor's Make PCB Library utility now respects XY offsets of component pads when building library component footprints. |
3392 | An AV in "PCB Rules & Violations Panel" will no longer occur after running an ECO that will remove nets from pads that have "UnRouted Net" Constraint violations. |
3490 | The error that used to occur when loading Gerber files in RS 274X format containing parameterized macro apertures has been fixed. |
4011 | In some situations extruded 3D bodies could jump to the origin after editing their properties - this has been fixed |
4077 | 3D bodies will now update properly when 'prefer simple' or 'prefer STEP' is selected in the view configuration |
4156 | A bug where the option PCB Editor -> Board Insight Display -> Minimum Object Size appeared to be capped at 10 is now fixed |
4162 | The speed of Clearance & Short Circuit DRC checks has been greatly improved. |
4263 | The addition of simple bodies to a step in a library component will now update correctly to the pcb document. |
4298 | An assertion failure that occurred when editing the QMatrix button has been resolved. |
4378 | Extruded 3D models with same Standoff and Overall heights will no longer produce critical crashes |
Schematic and System-level
11 | The borders of panels have been improved in Windows 7 and now draw correctly. |
12 | Examples have been move out of Program Files to allow them to be run on Windows 7 without admin rights. |
64 | What's This Help under Windows 7 now shows correct warning when is not installed |
77 | Publish to PDF now displays an information message rather than an error when Adobe Reader is not installed |
84 | List of missing Device Sheets is truncated if necessary to avoid error dialog exceeding screen size. |
174 | When script is stopped, evaluate dialog (Ctrl+F7) is processing Tab key correctly now and focus does not stay on the same control |
182 | EnableBasic scripts now display the script names correctly and can be executed. |
184 | The Edit Command dialog will now always stay on top of the Customizing Editor dialog when editing a process launcher. |
187 | The smart edit function from the Inspector has been improved. Now target text can be left empty allowing sections of text to be removed from all selected objects. |
193 | Code completion for Delphi script is now populating expected methods for functions returning an object. |
206 | Comparator engine has been optimized to significantly enhance performance of update PCB from Schematic for some Multi-Channel designs. |
209 | Ctrl+Delete keybinding that deletes text to the end of the word, is added to text editors |
210 | The Libraries Search dialog now applies the SQL quoting options of DBLIBs correctly, fixing errors when searching Oracle databases. |
211 | Filtering in DBLIBs that use Oracle databases now works. |
212 | A crash has been fixed, for Database Libraries that are Grouped in the library panel while using tables containing different column layouts (schema). |
267 | Memory leaks when updating PCB from Schematic document in multichannel designs have been fixed. |
273 | Memory leaks when comparing physical PCBs have been fixed. |
286 | Creating reports in To-Do panel with a single To-Do entry now works correctly. |
300 | Radio and checkbox controls are now rendered at the correct size when using Medium - 125% Display Settings in Windows 7. |
304 | Fixed port direction when port is connected directly to pin, with no wire/bus in between. |
324 | When Bill of Materials includes Not Fitted components, the varied values will now be used in the report. |
325 | OpenBus sheets can now be selected from the Sheet Symbol properties dialog |
336 | Now all the PCB Preferences pages will scale the controls according with the current size of the font (standard, medium, larger in Win7) & also current screen resolution |
337 | Various dialogs have been modified to display correctly when the Display is set to Medium 125% in Windows 7. |
339 | Closing document tabs using Ctrl+F4 keys is now more reliable. |
343 | Inspector Panel and Component Properties dialogs now open with the same column and section layouts |
345 | The =VersionControl_RevNumber special string now refreshes after committing to version control. |
392 | Outputers with missing Data Source documents are no longer silently excluded when generating outputs. This means that errors when generating releases are detected instead of being silently ignored. |
427 | Floating toolbars no longer become docked after changing any setting in Preferences. |
449 | Fixed accidental crash during synchronizing Sch and PCB, caused by graphical parts, which have electrical sub-parts (pins). Now Graphical part is completely ignored and excluded from navigating. |
453 | Dialogs which were last displayed on a physical monitor that is later unplugged no longer appear outside the physical dimensions of the screen. |
511 | Updating a project file from version control now requires you to use the Update Whole Project command, which includes missing files by default. This makes it harder to update a project without associated added documents. |
513 | The Delete and Rename commands now apply to the repository as well as the local working copy. |
522 | Issue has been fixed through the change to doing comparisons with polygons shapes rather than file parameters. |
538 | The "Execution time / Abort" dialog that shows when executing long running console applications (e.g., Subversion) has been improved. It now displays the progress of the application, and a Show Details >>> section which lets you see the console output. |
543 | File View now has Other Documents category for unknown document types |
552 | A crash that occurred when pressing the Test Connection button twice, has been fixed, when using Publish To Web with an Amazon S3 destination. |
563 | Changing library path now only affects location of user libraries |
569 | A repainting issue when resizing Wizard dialogs has been fixed. |
639 | For Windows Vista and Windows 7 support, the NexusCache.db file is no longer opened for writing in the Program Files folder. |
692 | You no longer need to restart Altium Designer after changing your version control preferences. |
697 | Altium Designer no longer creates or depends on the file asccprj.scc when using Subversion. |
717 | Folder permissions are now set to avoid a problem where multiple users on a Windows Vista and Windows 7 machine can lead to Access Is Denied messages when refreshing licenses. |
719 | Highlighting/unhighlighting nets in Schematic document now marks the document modified |
731 | Performance has been improved for various workspace, file loading and closing operations in network environments. |
760 | File Locking is now optimized to eliminate an unnecessary file check. |
784 | In Preferences, when using Set To Defaults for File Types, an error no longer occurs under Windows 7 or Windows Vista. |
808 | The Auto Detect Subversion button in preferences now finds bundled Subversion products (e.g., CollabNet and SlikSVN) more reliably. |
827 | Fixed printing of images in Schematic documents in grayscale/monochrome modes. |
835 | Added: under Windows 7 taskbar button now shows progress status during long operations |
836 | Added support for the Windows 7 Taskbar: a progress bar; and for Pinning Altium Designer to add right click options for launching and for updating Recent documents. |
842 | Improved Spice simulation DC convergence. Dynamic GMIN and source stepping algorithms (with new options DYNAMICDC and DYNAMICDCFACTOR) are executed if initial convergence fails. Set DYNAMICDC to false to use original Spice3 convergence algorithms. |
862 | The Open Workspace Documents command now displays a Confirm dialog, listing a count of documents by type for you to review, before proceeding to open every document. |
863 | A crash, where an output is configured while the OutJob is opened as a free document, has been fixed. |
871 | The Open from Version Control button on the File>>Open... dialog has been replaced with an enhanced File>>Check Out... command. |
872 | Optimizations now allow projects using Search Paths for model libraries such as footprints to open more quickly. |
877 | Added bubble notification to indicate if the running build is not the latest build installed. |
883 | Altium Designer panels, including the Soft Instrument Racks, now correctly support the Microsoft Aero window borders, supporting Windows Vista and Windows 7 operating systems better. |
913 | The spelling mistake in Orcad PCB file importer has now been corrected. |
920 | Speed of Spice simulations containing PSpice TABLE and VALUE sources has been improved. |
921 | A bug in the differential of the PWR function has been fixed that existed in the original Spice3 code. |
922 | The LIMIT function now produces the correct simulation results when the max and min limits are not constants. |
924 | Alphanumeric node names starting with a digit when used in Spice simulator equations no longer cause a parsing error. And the use of undefined node names will now generate an error. |
961 | Annotation files for a project which are in the project folder but are not part of the project have always been used by Altium Designer. Release 10 now warns about this and will add these files into the project. |
985 | During parametric import of SimView waveforms, warnings are now sent to messages panel when illegal characters appear in wave names, instead of displaying dialog. |
986 | SimView scrollbars now update correctly after parametric import of waveforms from a file. |
987 | SimView waveform import now handles large files better with optimisation of imported waveforms, and ability to select via script parameters which waves to import. |
1003 | Interoperability between Altium Designer and MS Office 2007 and 2010 have been improved. |
1009 | The "Publishing to PDF" caption no longer gets stuck on the status bar. |
1023 | An Out of Storage error when printing or publishing Project Physical Documents of schematics containing embedded WMFs from OutJob and Smart PDF has been fixed. |
1099 | GDI object handles no longer leak when option to show full path in hint is off in workspace preferences |
1106 | A GDI object handle leak that occurred after hovering over a project icon while Project Insight is enabled has been fixed. |
1111 | Fixed painting of Inspector and List panels after quitting transparent state |
1114 | On-Demand licenses are now less likely to become invalidated by the presence of additional network adapters. |
1122 | Document preview files are no longer stored in the same folder as the document. Hidden sub-folder is created now to store preview files. |
1251 | Account Sign In - user name and password are now trimmed of leading and trailing spaces. |
1260 | The PADS importer will no longer create layer names longer then 256 chars when multiple PADS layers map to the same Protel layer |
1306 | A bug involving the positioning of ports in Convert Part to Ports has been fixed. |
1371 | Fixed default toolbar layout for Harness and Annotation documents |
1380 | Smart PDF no longer lets you generate a PDF of the Free Documents project (which would fail when creating a nonexistent directory). |
1381 | Schematic Parameter Sets now have a Style property. The new Bubble style is about the size of a wire junction, reducing clutter in schematics. |
1382 | Rotating a part with the Mirrored flag set now correctly sets the Orientation attribute, so it can be successfully used in Update from Libraries. |
1383 | Placing a component on schematic from the Libraries panel no longer resets the Mirror flag if you hit X or Y while dragging and the source SCHLIB file is currently open for editing. |
1384 | Signal harnesses with diagonal segments are now drawn correctly on the schematic document. |
1453 | Projects Panel Design Insight hints now use the Mouse Hover Delay preference setting, and should no longer stick to the screen. |
1454 | The output file or folder name in Publish To PDF settings is now saved as a relative path, making it easier to move OUTJOB files between different projects and folders. |
1455 | Displaying a library in the Libraries panel before any schematics are opened (so that it says Click here to draw component), uninstalling it in preferences, then clicking on Schematic preferences no longer leads to a crash. |
1456 | File translators will now be loaded only when the user starts the Importer Wizard. |
1464 | The Subversion password dialog now sticks. |
1502 | Project compile has been fixed to correctly group subparts together into components when assigned duplicate designators. This was causing issues with syncronisation to pcb. |
1507 | The Xilinx Spartan-6 board level library has been updated and now includes devices in CP196, CS484 and FG900 packages. |
1532 | Subversion performance has been improved in some situations involving slow network repositories. |
1533 | Export STEP is now available as an outputer that may be configured in OUTJOB files. |
1549 | .svn, _preview and history folders are not displayed anymore while refactoring a sheet symbol into a device sheet |
1591 | Windows Vista and Windows 7 do not allow logs to be written to the Program Files area, so the DXP.log file has been moved to the local profile, and has been renamed to portal.log. |
1593 | The creation of nested folders now works correctly when adding a project to a file: based Subversion repository |
1612 | Disruptions to On-Demand licensing caused by portal outages are reduced by increasing the time periods between lease checks. |
1614 | A crash when renaming project files in the Storage Manager panel has been fixed. |
1620 | A right click menu was added to the Class Generation page of the Project Options to allow multiple rows to be changed at the same time. |
1627 | The Update from PCB libraries feature has been re-engineered to fit in the new PCB Release management system |
1642 | Floating panels positioned on a monitor that is later detached now move to your default monitor instead of remaining off your desktop indefinitely. |
1669 | Fixed bug in navigation system, which caused multiple Home pages to appear |
1690 | Fixed F3 (Find Next) in Schematic editor |
1712 | The Add Project to Version Control command now pops up a browser dialog to let you select the location in the repository, and excludes files that would give you errors if you selected them. |
1732 | Fixed some component selection issues in the Update From Libraries dialog. |
1733 | Fixed issue when multiple Home pages could be opened in Altium Designer |
1734 | In the schematic component dialog, multiple parameters are now able to be selected. |
1750 | The ECO will no longer change any existing rooms when updating the PCB document with current changes. Any new components will be added without touching the room's location or position. The new components will be added in the center of the room |
1756 | Mapped drives are no longer absent from the SVN Browse for Folder dialog. |
1789 | You can now pan the 3D library PCB model preview with right click+drag. Zoom is now Ctrl+right click+drag and rotate is now Shift+right click+drag for consistency with the PCB editor. |
1796 | The green arrows in OUTJOB files should no longer look broken after certain operations. |
1804 | Text Strings can now be pasted as net objects using Paste Special |
1805 | A new net scope has been added to PCB projects, Strict Hierarchical. In this mode all power port objects are now local objects. |
1808 | Added message to the Messages Panel if project compilation finished successfully. |
1809 | The pin swapping dialog now shows the display mode of pins where multiple component display modes exist |
1850 | A bug has been fixed, where the power ports takes priority net naming option would not work sometimes when the power ports were connected to port. |
1866 | Enabled Document Links in components placed in device sheets |
1885 | The web server examples in the build now report their statistics when the address http://xxx.xxx.xxx.xxx/?action=network_statsis requested. Also the ethernet version of this example updates its MAC address to be unique based on your NanoBoard ID. |
1891 | Fix long startup delays when opening projects |
1902 | Fixed AutoBackup to not store documents if no actual modification was made since last auto-backup. |
1908 | There is now an Add Folder to Version Control command in the Projects and Storage Manager panels. |
1922 | A crash involving schematic libraries with the "Always Show Comment/Designator" option checked has been fixed. |
1923 | The pads that have offsets will now be exported correctly to ODB++ if they have a valid shape on solder/paste mask or silkscreen layers |
1926 | Designators, Comments and Parameters now update properly from the library when autoposition is off, or placed part is rotated. |
1940 | A redraw issue after Cutting a selection containing only pins has been fixed. |
1942 | Fixed Hide All in Project command |
1945 | Preferences are now imported page by page giving you more control over which settings you import. |
1948 | Fixed loosing of bus exporter/importer configuration in OpenBus after relinking the components |
1975 | The schematic =VersionControl_RevNumber special string should now update correctly during output. |
2019 | Ctrl-drag of a component no longer inserts duplicate wires where a pin connects to multiple other pins. |
2020 | User input is no longer processed while storing a file to local history. |
2032 | For improved Windows 7 compatibility, the virtualization of the file system and registry is disabled in Release 10. |
2063 | Live links to supplier data feature now supports Mouser. |
2089 | Add and Remove operations now only schedule files for addition or deletion, allowing complex changes to be committed atomically. |
2091 | You can now Lock and Unlock files in Subversion to avoid getting into conflicts. |
2117 | The Heads Up Opacity & Delay properties will now be correctly saved after changing them using the edit box controls & immediately clicking the Apply button |
2123 | Fixed out of memory error when Net Harnesses were connected recursively. |
2142 | Saving a file no longer capitalizes letters in the file name (which used to interfere with case sensitive tools like Subversion). |
2147 | Fixed flicking of Messages panel |
2148 | In Projects Panel, Close Project Documents immediately after Open Project Documents no longer causes Access Violation. |
2153 | Bus joiners have unique designators on a project level, instead on a document level. |
2177 | The Text Editor preferences now allow language to be configured even if no text document is open for editing. |
2205 | Special strings like "=Value" are now evaluated in parameter variations (in schematics and in outputs generated from schematic projects). |
2261 | When importing preferences, standard installation paths are updated to cater for software version and operating system discrepancies. |
2269 | Fixed occasional crash on opening workspace by drag'n'drop over opened schematic |
2278 | Improved GDI resource handling |
2282 | The Version Control menus have been made more consistent. |
2283 | There are now new "Resolve Conflict" and "Revert Local Modifications" commands. |
2290 | A crash associated with Subversion running in a directory from a disconnected drive has been fixed. |
2329 | Support for the MatrixOne and Microsoft SCCI version control plug-ins has been removed. |
2335 | Ampersands (&) are now correctly represented in the Startup/Help>>About screens. |
2358 | The Whole Project commands now don't hide non-project documents by default. You can select all project documents using the right click menu. |
2372 | Users can now select suffix options for Component clarity in their step exports |
2418 | Ctrl-drag of wires has been improved, redundant line segments are no longer created. |
2422 | Occasional crash when navigating around projects is fixed. |
2423 | Fixed PCB/Sch List panel when large fonts are used |
2487 | Added a fit to width checkbox to the Variants dialog which, when disabled will expand each column to fit to contents. |
2506 | Window caption of the Monte-Carlo specific tolerances dialog is no longer modified while editing grid values. |
2508 | Single Layer Pads on Mechanical Layers 17-32 are no longer absent from the Gerber Output. |
2518 | Warning message will now appear every time the user attempts to move a locked object. |
2612 | When running an Update from PCB libraries, the "Update from PCB Libraries - Options" dialog will contain a list of only those layers actually in use in the PCB. |
2620 | Net name no longer propagates between a pin designator with the same name as a net that is connected to a hidden pin. |
2635 | The Gerber Export of offset pads is no longer incorrect when the output layers are mirrored. |
2730 | Fixed resizing of Home Page |
2757 | Orcad DSN exporter issues causing AVs have been fixed. |
2861 | The error "Can't create tunnel: The system cannot find the file specified" in certain situations using svn+ssh: repositories has been fixed. |
2880 | Make PCB Library no longer intermittently causes pad size changes. |
3082 | P-CAD ASCII Export will now write the "CompPinRef" fields in ascending order taking into account if the pad names are numerical or not. This will insure that the order for numerical pad names will be 1, 2,3 ..10, 11,..20, 21 and so on. |
3153 | Supplier Link fields in a BOM can now be sorted properly without causing an error message. |
3169 | The PADS Importer now is able to load PADS ASCII files V2005.2 that contain a DOCUMENTS_LIST section before the PADS LAYERS section. |
3176 | ODB++ output will no longer discard fills that are rotated 360deg instead of 0deg. |
3178 | The ECO from Schematic to PCB will no longer place some multi-channel components in the middle of the whole PCB workspace (~1.2m away). |
3181 | The Specctra Design Files now import as expected. |
3310 | When saving PcbDoc in DXF/DWG format, rounded rectangle pad shapes are now exported correctly. |
3420 | An "Out of Memory" exception will no longer occur when generating ODB++ for designs containing No Net hatched copper-pours on any of the signal layers. |
3511 | ODB++ output of attributes has been improved. Now following attributes will no longer be exported:.connector, .target, .component, comment, hole_type, gold_finger & serial_number. |
3856 | A new context sensitive search feature is added to the DXP menu allowing searches of live compiled project data such as Reference Designators, menu commands and other product information. |
3857 | Varied project parameters will now display correctly in PCB & also in assembly, Gerber & ODB++ outputs. |
4144 | A large delay is no longer experienced when opening a schematic when the "Write debug information into the Output Panel" preference is enabled. |
4181 | Issue when commit releases that contains no Schematics document, that causes release to fail. |
4290 | Synchronize sheet entries and ports now works correctly. |
4306 | The number of installed plugins is now consistent, it always includes the base platform module. |
4362 | Strings such as "Tolerance" now evaluate correctly in Schematic special Strings. |
FPGA and Embedded
38 | Fixed bug in Terminal instrument, which causing embedded application to stuck unless Terminal window is opened |
85 | The USB symbol of the FPGA NB3000 Port-Plugin library has been reviewed and the USB_D port corrected to USB_D7..0 as expected. |
97 | Additional line feed are no longer issued to the output panel after stepping over printf function calls while debugging code. |
115 | Menus of the lab feature AGUI editor have been reviewed and are no longer docked to the wrong side of the workspace. |
126 | The FPGA IP Import Wizard has been reviewed and is now able to import complex Altera cores with encrypted source files. |
128 | The SDRAM controller has been improved for speed and is now offering caching capabilities. |
129 | Added scripting support for Wishbone Probe instrument. |
131 | Wishbone Probe can now be used on the peripheral side of the processor |
132 | Certain errors in FPGA projects have been escalated to Fatal Errors, to ensure the build flow is stopped as early as possible when serious errors are found. |
134 | Added scripting support for Crosspoint Switch instrument. |
137 | A new option has been added for the Devices View to automatically save FPGA source documents before running the flow. |
138 | New WB_CELLULAR and WB_GPS_NMEA cores have been added with Software Platform drivers for implementing GSM (2G/3G) and GPS applications. Example projects can be found in the "Examples\Soft Designs\Mobile" folder. |
141 | Re-compiling FPGA projects is no longer causing FPGA and Embedded projects to be marked as dirty if they haven't been modified. |
152 | A new reference design illustrating how to use the support for USB WiFi is now available in the Examples\Soft Designs\Showcases\NB3000 USB WiFi MSD Webserver directory. |
157 | It's possible now to use in OpenBus external memories and peripherals (via bus exporters) |
161 | The configurable clock manager component now supports Actel ProASIC, Fusion and IGLOO devices. |
201 | The Synthesize command from the Design menu for FPGA project is no longer failing to find pre-synthesized models for some configurable components - including the WB_SPI core. |
228 | The size of the internal memory for 32-bit soft processors is no longer limited to a size of power of 2 and it can now be set to any values. |
243 | The memory size for the flash memory controller of the NB3000 Shared Memory Controller is now set to 16MB to reflect the size of the parallel flash memory device fitted on the NB3000. |
283 | Renaming a processor on an OpenBus sheet no longer removes interrupts connected to that processor. |
293 | The FPGA_STARTUP components have been reviewed to fix incorrect number of delay cycles while targeting some devices - including Spartan-3AN, Spartan-6, Virtex-4 and Virtex-6 devices. |
303 | A new WB_MP3DEC core with Software Platform drivers is now available and a reference design to illustrate why to use it is available in the Examples\Soft Designs\Audio\NB3000 MP3 Decoder folder of the installation of Altium Designer. |
375 | The TFT_PEN symbol of the FPGA NB3000 Port-Plugin library has been reviewed and its pins re-ordered to make connectivity with generated harness connectors of SPI cores easier. |
383 | High CPU utilization as well as some minor performance issues have been addressed in USB JTAG implementation |
385 | Software Platform documents no longer appear empty if opened as a free document. |
430 | The Software Services section of the Software Platform document has been review and services links and names have been updated for clarity and constancy. |
432 | The choice of HDL to use can now be set at a project level, for synthesis and for simulation. These settings are available in the project options and will default to your global preference under general FPGA preferences. |
452 | Processor now remains paused in a debug session when the PC register is changed using the Nexus Debugger |
493 | A new reference design illustrating how to use the Plug and Play support for USB Webcams is now available in the Examples\Soft Designs\Display\NB3000 USB Video directory. |
497 | The serial and parallel flash memory programmers are now available for the NiosII processors. |
498 | Software platform startup code (in cstart.asm) can now be placed in external memory. |
528 | Expanding large arrays no longer causes AD to crash |
585 | The WB_SPI8, WB_SPI32 and WB_SDCARD cores can now be used together on the same design without causing Build errors while targeting an Altera device. |
586 | Nios compiler error for inline assembly with "m" constraint has been fixed. |
629 | Added item to messages view when embedded project files are downloaded |
686 | The "Select Processor" entry can now be changed only for "Generic" TASKING devices. The entry is fixed (disabled) for all other device selections. |
688 | A software platform problem on NiosII with thread context switching and native interrupts has been fixed. |
699 | The configurable clock manager component now supports Spartan-6 devices. |
702 | Adding multiple NiosII processors in a schematic based FPGA project is no longer causing the FPGA flow to fail. |
713 | An error "Unable to find child model Configurable_UX in output folder" is no longer issued when trying to publish a core project that includes generic configurable components. |
739 | AltiumSynthesizer does not infer circuits for divide and modulo operations. An error is issued when a div or mod operator is used in the HDL. |
748 | The constraints files for the NB3000XN board have been updated to avoid an error in the FPGA flow while timing requirements have been set to the ETH_TXC and ETH_RXC ports of the Ethernet interface. |
758 | Fixed a problem where debugger could enter an infinite loop when updating variables. |
765 | Double clicking on Linker error in the Messages panel no longer opens Embedded Project file. |
769 | If attribute FPGA_INHIBIT_BUFFER is associated with an object then attribute FPGA_IOSTANDARD is neglected (i.e. not passed to SIS/Map not passed to edif). |
794 | Message Panel now shows correct format if source file path contains parentheses. |
796 | The Software Platform library is no longer recompiled unnecessarily when the Embedded project is unmodified. |
797 | Running an ARM application in the instruction set imulator no longer fails for ARMv6M and ARMv7M Cortex cores. |
824 | The WB_SPDIF core no longer generates spurious interrupts. |
851 | It is now possible to add signals to the Logic Analyzer and Digital IO instruments using the Paste button of their configure dialog while objects like NetLabels have been copied using Ctrl+C - Copy As Text is no longer required for this operation. |
886 | Sections in AltiumSynthesizer report files can be collapsed/expanded facilitating easier navigation within the file. |
903 | FPGA Configurable Generic IntLib extended with Divider/Modulo and Multiplier components. |
923 | Actel Igloo Nano AGLN010 device is now supported |
930 | It is now possible to set pin to pin, pin to flipflop and flipflop to pin maximal timing delay in the Constraints editor using the FPGA_DELAY_MAX, FPGA_DELAY_MAX_FROM and FPGA_DELAY_MAX_TO constraints. |
974 | Windows computer waking from sleep while connected to running NB3000 does not cause problems in AD scanning jtag. |
1011 | In System Flash support for Spartan3AN devices has been improved. Only sectors required for programming device are erased during operation preserving user data. |
1041 | The Miscellaneous Import The Following Data Object Files Linker option for Embedded project is now adding imported objects to the dependency list of the generated makefile as expected. |
1042 | Support for C library 'errno' has been made thread safe in Software Plaform Multithreading Support. |
1051 | Compile mask for code symbols can be applied without side effects on code symbols that refer to the same C source file. |
1058 | It is now possible to change the default initialization of memory components from big to little endian via a new option in the configurable memory component dialog or by adding an endianness parameter with a value set to little for memory components of the FPGA Memories library. |
1097 | The configurable clock manager is now working as expected while targeting a Xilinx Spartan-3E Automotive device. |
1102 | CHC log files are added to project; Individual functions are outlined; Variables and functions are color coded. |
1116 | Core projects targeting Altera devices can be synthesized with Altium Synthesizer now. Duplicate component error from Quartus when both main design and core projects were synthesized with Altium synthesizer are resolved now. |
1119 | The Terminal instrument has been improved so that it will not cause the controlling processor to hang. Previously the processor would hang if the terminal was visible and then shut down, or the JTAG connection lost. This no longer happens. |
1120 | Software Platform Multithreading Support now includes support for Semaphores. Check knowledge center for API description. |
1153 | The Fit Document command in the View menu of the waveform editor no longer shows the simulation signals up to the time of the last transition that occurred, but instead shows signals up to the time the simulation has been ran to. |
1194 | It is now possible to create Verilog libraries for FPGA and Core projects. |
1196 | It is now possible to generate Verilog testbench files automatically from Schematic and Verilog files through the Create Verilog Testbench command of the Tools Convert menus. |
1204 | It is now possible to generate Adder/Subtractor components from the FPGA Generic Library in Verilog format. |
1206 | It is now possible to generate Joiner/Splitter components from the FPGA Generic Library in Verilog format. |
1207 | It is now possible to generate Comparator components from the FPGA Generic Library in Verilog format. |
1209 | The MUX and DEMUX components from the FPGA Configurable Generic Integrated Library can now be generated in Verilog format. |
1210 | It is now possible to generate PWM components from the FPGA Generic Library in Verilog format. |
1211 | The Register Component from the FPGA Configurable Generic Integrated Library can now be generated in Verilog format. |
1214 | Pre-compiled libraries for Vendor specific resources are now included by default while running HDL simulations and can be managed through the FPGA Simulation Compiler system options. |
1215 | It is now possible to Highlight and Reverse Bus signals during HDL simulation. |
1220 | The simulator is now properly starting with the selected testbench when multiple testbench files are included in the project. |
1221 | Simulation Testbench Document option for FPGA project is now properly saved when testbench files with same names but different extensions are included in the project. |
1223 | The Compile command is no longer missing in the Project menu and the Right Mouse click menu of the Projects Panel when a VHDL or Verilog testbench file in focused. |
1258 | TCP/IP stability is improved |
1268 | New CodeSymbol Explained reference designs for NB2 and NB3000 are available in the Examples\Soft Designs\C to Hardware\ folder of the installation of Altium Designer which illustrate all "interface types" supported by C Code Symbols. |
1272 | All generated files for HDL Simulation are now generated in a single output folder to avoid conflicts. |
1309 | Software Platform support for multiple interrupt handlers per interrupt line. |
1310 | EMAC32 driver support for rx/tx interrupt notification. |
1311 | UART8 driver supports non-blocking mode and several blocking modes for threaded applications. |
1314 | Software debugger now does a hard reset instead of a soft reset when starting the application. |
1319 | Fixed an issue where swplatform.h sometimes failed to include certain plugin-generated headers. |
1325 | An error is now reported for c to hardware code symbols when there is a mismatch between c parameters and code entries. |
1360 | An error "Unable to find Synplicity For Actel" no longer occurs while the synthesizer is set to Synplicity For Actel and Actel Libero 9 is installed. |
1362 | CHC Wishbone Multi-Cycle Bus Adapter asserts DONE signal after reset. This enables you to test whether a hardware function is active before calling that function. |
1438 | The pins of rotated and mirrored configurable components are now placed and aligned as expected after the component is re-configured. |
1439 | An access violation in verapi.dll no longer occur when Verilog source files contain synthesis attributes - including the synthesis syn_ramstyle attribute. |
1442 | Collision when processor connected to Terminal instrument and Altium Designer Nexus driver try to update the Terminal instrument status register at the same time, causing characters to be incorrectly captured in instrument rack panel, no longer occur. |
1443 | The synthesis stage of the FPGA flow no longer fails while NANOBOARD_INTERFACE instruments are included without a connected script project. |
1444 | The AB_SYSTEM component is no longer missing from the Actel Fusion FPGA library. |
1445 | Configurable Memory Instrument no longer fail the FPGA build flow when the Support Byte Enable option is selected. |
1446 | Pressing the Space key no allows to toggle between different shapes (normalized, flipped, straight) while placing links in OpenBus document. |
1447 | Added scripting support for Frequency Counter instrument. |
1448 | Added scripting support for Frequency Generator instrument. |
1449 | Added scripting support to Terminal instrument. |
1450 | Names of black box modules referenced in Verilog had been rendered incorrectly under certain circumstances. This has been corrected. |
1451 | External tristate buffers are no longer instantiated incorrectly for internal ports. |
1452 | The synthesizer now emits a warning if an output signal is used in a sensitivity list. |
1461 | The C++ project option "Check for Embedded C++ compliance" is changed into "Comply to embedded C++ subset". The explanation is improved. |
1470 | Endianess problems with support for Altera's little-endian Nios II processor core have been resolved. |
1477 | An issue with the flipflop optimization of the Altium synthesizer has been corrected. |
1488 | Synthesis of configurable digital IO no longer fails with XST when schematic netlister is verilog. |
1499 | Generic ClockManager - Fixed "No Solution " being shown when no device is present in devices view. |
1506 | The Xilinx Spartan-6 driver has been updated and now includes devices in CP196, CS484 and FG900 packages. |
1508 | Shared Memory Controller includes Wishbone bus arbitration logic now allowing other multimasters to be wired directly to its ports bypassing wishbone interconnect. |
1511 | The Create HDL Testbench commands have been moved from the Tools Convert menus to the Simulator menu. |
1536 | C compilers in Altium Designer now support the CERT C Secure Coding Standard as defined by CERT (www.cert.org). |
1550 | AltiumSynthesizer: Portnames of a VHDL entity instantiated within a Verilog module are mapped case insensitive when a case sensitive attempt fails. |
1603 | It is now possible to set multiple testbench configurations for a project and the configurations can be selected directly from the Simulator Simulate submenu. |
1607 | Warnings about duplicated constraints are no longer issued during Translate Design while targeting a Xilinx FPGA. |
1611 | NB3000 firmware has been improved. Clock settings are correctly saved on change. |
1617 | No longer need to call CreateSignalInstrumentManager and ReleaseSignalInstrumentManager to be able to use Digital IO instrument from scripts |
1628 | i2cm_open now times out if no I2C slave is connected and no longer causes the application to hang |
1675 | Support for distributed memory for Lattice FPGAs has been added in Altium Synthesizer. |
1686 | Color coding of C language extensions used by C Code Symbols has been implemented. |
1729 | POSIX kernel signal queue no longer corrupted if last member gets re-inserted. |
1730 | Stacks are initialized with a non-zero byte pattern when Multithreading Support DEBUG option is set. |
1739 | MIDI Software Platform peripheral plugin has been updated to distinguish it from other UART8 plugins. |
1781 | The Lightweight IP TCP/IP stack included with the Software Platform has been updated to version 1.3.2. |
1853 | Programming Altera FPGAs via JTAG is no longer failing while the On-Chip Bitstream Compression project option is enabled. |
1854 | Context restore from POSIX interrupt on TSK3000 now properly restores IEp bit. |
1865 | Reference/Dereference is removed from Code Formatting, Spacing in embedded project options. |
1869 | OpenBus bus importer and exporter pins can now be included or excluded individually. |
1887 | When a configurable REGISTER from the FPGA Configurable Generic library is configured as type Transparent Latch its logical behavior is was not correct. This issue is now fixed and correct behavior can be expected. |
1890 | Empty string attributes in vhdl are correctly translated in Altium Synthesizer produced edifs. |
1913 | Removed inconsistent "drv_" prefix from TMR3 driver API in software platform. |
1920 | For inferred RAM: if the size of the array in not equal to the size that can be decoded with the address lines then an informational message is displayed. Example: WARNING: BLOCK RAM 'ram' address bit #0 is constant (net "(VCC)"). |
2008 | PB01 VIDIN_PCLK video input clock is constrained in the PB01 constraint file now. Maximum frequency is set to 27MHz. |
2052 | Added two new predefined macro's _ALTIUM_BUILD_MAJOR_ and _ALTIUM_BUILD_MINOR_ containing the build numbers for Altium Designer and useful to create conditional C code. |
2058 | Posix function sigwaitinfo() now returns the selected signal number or -1 to indicate an error. |
2155 | EvalBoardTester Design has been modified. Bus constants have correct format modifiers now. |
2166 | Nios interrupt handler is now always installed when software timers are switched on in Software Timing Management service. |
2178 | Preferences for text editors now allowed to select any custom color for syntax highlighting. |
2211 | tvp5150_get_register function in software platform returns correct value now. |
2233 | Programming Lattice ECP2 devices configured to boot from external SPI via JTAG no longer failed to program when the SPI device is programmed. |
2240 | SwPlatform file can now be moved around in sources list of project panel. |
2375 | Order of the RGB leds are no longer reversed when using the LEDS_RGB port plug-in for NB3000AL board. |
2388 | Scaled print from waveform viewer now looks correct |
2399 | Resolved issue where LED controller cannot be set to "Signal Harness" interface type. |
2403 | Embedded project compile now benefits from multicore host machine to speed-up compilations. |
2426 | VHDL Libraries are now working as expected while set for Synthesis. |
2433 | POSIX kernel routines for attribute initialization will now re-initialize argument object when invoked more than once. |
2465 | Editing Openbus component Interconnect before placement no longer causes Altium Designer to crash. |
2474 | Order of the DIP switches as shown on the board silkscreen are no longer reversed when using the DIPSWITCH port plug-in for NB3000AL board. |
2530 | Altium Designer no longer crashes at synthesis when using NiosII in the FPGA projects. |
2541 | Altera QuartusII and Nios10.0 is now supported in Altium Designer. |
2543 | Xilinx ISE12.2 is now supported in Altium Designer. |
2663 | Improved typedef resolving for proper typename lookup. |
2668 | Provide a more meaningful error message if software platform is not found. |
2718 | DualMaster and Multimater arbiters have been improved. Address bus width 1 is correctly handled in schematic and Openbus designs. |
2767 | Programming Actel ProASIC+ devices while running a computer that does not have a parallel port no longer causes series of crashes. |
2810 | SPB inspector description pane now shows a scrollbar when the text does not fit |
2819 | Changing the options MQ_OPEN_MAX and MQ_PRIO_MAX for the "Message Queues" service have no effect. |
2829 | NB3000 Firmware update procedure has been improved. Erase/Programming flash device status is handled correctly now. |
2836 | Peripheral base addresses and interrupt numbers are now available as macros through automatically generated software platform "devices.h" file. |
2838 | In an embedded ARM project it is now possible to set the Thumb code generation option separately for each individual C/C++ module. |
2854 | Threads panel now shows correct scheduling policy for threads with a scheduling policy other than FIFO. |
2855 | Support for "->" and "::" as field separators was added |
2894 | EMAC32 core has been improved. The core automatically reports link status changes via interrupt mechanism. |
2898 | C compiler now supports anonymous unions in structure definitions. |
2917 | Out-of-memory condition in pthread_setspecific() no longer results in NULL pointer access. |
2925 | Expanded variables are now shown expanded after target execution |
2929 | Maximum POSIX thread stack size in the software platform is no longer limited to 64kB. |
2953 | Memory Controller MEM_CTRL has been improved. Generated HDL code for Asynch memories no longer produces a warning during build process. |
2971 | GUI example is updated with interrupt connected and it now runs on NB2 per configuration. |
3030 | DualMaster and Multimaster components have been improved. They no longer produce warnings during synthesis stage. |
3047 | Altera Cyclone 3 default IO Standard Voltage setting has been adjusted to 2.5V. |
3053 | POSIX sporadic server thread now frees its timers upon thread exit. |
3068 | A return code bug in CAN driver can_getdata_rxmo() is now fixed. |
3073 | The Debugger Timeout dialog has been review to focus controls in a more conventional order when pressing the arrows keys. |
3101 | FPGA Signal Manager has been improved. Assign Unconstrained Signals function operates correctly on ports with long names. |
3133 | Spartan3AN In System Flash support has been improved. Programming internal flash works correctly regardless of FPGA position on jtag chain. |
3146 | NB3000 Slideshow example update for NB3000 boards. SPI Flash start address has been corrected for each NB3000 target. |
3170 | Configurable Clock Manager has been improved for Altera targets. |
3183 | UCF file import no longer crashes with missing ";". |
3203 | Fixed ARM simulator to handle interrupts also correctly in Thumb2 (Cortex M3) mode. |
3235 | The Place and Route stage of the FPGA flow no longer fails with an error "The PAR option, "-t" (Starting Placer Cost Table), is disabled for this architecture" while targeting a Xilinx Virtex-5 and Virtex-6 device and ISE 12.x is running. |
3372 | Xilinx UCF files are now imported as expected when the Construct Bus Constraints option has been enabled. |
3427 | Corrected the default value for USB JTag Speed slider in the FPGA Preferences panel. |
3660 | Altera QuartusII and NiosII version 10.1 are now supported. |
3674 | Module ports expressed in Verilog 2001 style where not listed in CodeExplorer, this is fixed. |
3860 | Posix ASR context switch routine has been updated to handle tsk3000 previous interrupt enable flag. |
4010 | The Xilinx CoolRunner XPLA3 devices with PQ208 package are now properly recognized in the Devices View. |
4272 | Programming Actel devices when running Windows-7 is no longer failing. |