Programming In-System Flash Memory for a Xilinx Spartan-3AN Device
Contents
The Xilinx® Spartan™-3AN family of FPGAs feature In-System Flash (ISF) memory. To a design programmed into and running on such a device, this memory is presented as SPI-based serial Flash memory – similar to the dedicated SPI Flash memory found on an Altium NanoBoard.
In terms of Altium hardware, the NanoBoard 3000XN (Xilinx variant) and Xilinx Spartan-3AN daughter board DB41 (for attachment to a NanoBoard NB2), both feature a Xilinx Spartan-3AN device (XC3S1400AN-4FGG676C) as the User FPGA. This device has 17,301,504 bits (or 2.06Mbytes) of In-System Flash memory.
This memory can be used to provide embedded memory functionality within an FPGA design, enabling you to load and store an embedded software file that will be used when the target design is running. It can also be used to store a design with which to boot the User FPGA on powering the respective NanoBoard. In fact, when you initially power an NB3000XN 'out-of-the-box', the resulting slide-show design project that loads has been pre-programmed into this Flash memory.
The following procedure outlines the steps required to access and program the In-System Flash memory of a Spartan-3AN device, from within Altium Designer. Attention is given to the use of this memory for bootstrapping purposes.
Booting from In-System Flash Memory - How it Works
When bootstrapping the User FPGA on your NanoBoard with a pre-built design, the FPGA's In-System Flash memory is used to accommodate the FPGA programming file (bitstream file – *_cclk.bit). For a simple design that does not utilize code stored in external memory, this file is all that needs to be programmed into the Flash memory. Upon power-up, the FPGA programming file is automatically downloaded into the User FPGA, while the embedded code is downloaded along with the design and located into the FPGA's Block RAM.
For a design that makes use of application code stored in external memory, the relevant embedded application code (Hex file – *.hex) must also be programmed into the FPGA's In-System Flash memory. In this case, the bitstream file and Hex file are typically combined together into a .bin file. Upon power-up, the FPGA programming file is automatically downloaded into the User FPGA. What happens with the embedded application code depends on the type and location of memory used by a processor in your design:
- Internal Memory usage – this code is downloaded as part of the bitstream file to the User FPGA (and is destined to reside in internal Block RAM).
- External Memory usage – this code needs to be loaded into the independent SRAM accessible by the User FPGA.
In the case of the latter, this is performed by having a Flash SPI Bootloader component (WB_BOOTLOADER_V2) in your design. The bootloader component provides the interface between the FPGA's In-System Flash memory and the independent SRAM. Provided the device is enabled for boot operation (by taking its ENABLE line High), then as soon as the design is programmed into the User FPGA (or an external reset is issued if already programmed) the embedded application code – Hex file stored in the Flash memory – will be copied into the SRAM.
If you are making use of the FPGA's In-System Flash memory for embedded purposes, ensure that the WB_BOOTLOADER_V2 component in your design is configured for operation as an SPI Controller. This allows direct serial communications with the memory, via the SPI_ACCESS primitive.
Accessing the In-System Flash Memory from the FPGA Design
For a simple design that does not require access to code stored in external memory – and therefore does not require a bootloader peripheral as part of the design – access to the FPGA's In-System Flash memory requires no modification to your design. Simply use the available commands to interact with the memory as required.
For a design that utilizes a bootloader peripheral, and for which application code is required to be transferred from the In-System Flash memory to external (SRAM) memory at power-up, you must add the Xilinx In-System Flash Access primitive (SPI_ACCESS) to your design. This primitive can be found in the Xilinx Spartan-3A FPGA.IntLib, located in the \Library\Xilinx folder of the Altium Designer installation. Add this library to your installed libraries accordingly.
The SPI_ACCESS primitive is also required should your design not require bootloading functionality, but does make use of the In-System Flash memory for embedded purposes.
The Xilinx SPI_ACCESS primitive.
This primitive effectively sits 'between' the Flash SPI Bootloader component (also in the FPGA design) and the FPGA's In-System Flash memory array. An example of the use of this primitive can be found in the example project NB3000XN_Slideshow.PrjFpg, located in the \Examples\Soft Designs\Showcases\NB3000 Slideshow folder of the installation. The following image shows the connectivity between this primitive and the external signals from the bootloader component (which itself resides on an underlying OpenBus System document).
Example of the interface wiring between the bootloader and the
SPI_ACCESS primitive.
In this example project, the SPI_ACCESS primitive has been modified only with respect to its graphical representation, to make pin-to-pin connections easier and more tidy. Notice also that as SPI communications with the In-System Flash memory does not involve the NanoBoard's SPI bus, the SPI_MODE signal is not used and is simply left unconnected with a No ERC directive applied.
Accessing In-System Flash Memory Commands
Commands for interacting with the FPGA's In-System Flash memory can be found on the Configuration Flash sub-menu – accessed by right-clicking on the icon for the physical FPGA device, in the Hard Devices region of the Devices view (View»Devices View).
Commands for interacting with the In-System Flash memory in the Spartan-3AN.
Reset Hard Device Flash
Use this command to erase all current content in the FPGA's In-System Flash memory. Progress of the erasure process is reflected in Altium Designer's Status bar.
Program Flash with Current Project
Use this command to download the programming file for the current project, to the FPGA's In-System Flash memory. The command is only available once the Build stage of the associated Process Flow is run – to generate the required bitstream file (*_cclk.bit).
The process involves first erasing the content of the Flash memory, then downloading the programming file to the Flash. Progress is reflected on the Status bar.
Use this command if your design uses embedded code that is to reside internal to the FPGA. This command Does Not create a bin file. If your design utilizes (additional) external memory for its embedded application code, you will need to manually create a bin file containing the *cclk.bit and .hex files. This file is then saved to Flash memory using the Configure Hard Device Flash command, and subsequent _In System Flash Memory Controller For Xilinx Spartan-3AN dialog.
Configure Hard Device Flash
This command provides access to the In System Flash Memory Controller For Xilinx Spartan-3AN dialog, containing controls that offer you greater flexibility when programming the In-System Flash memory.
The dedicated memory controller dialog provides a detailed GUI to the In-System Flash memory.
Erasing the Flash Memory
Before loading the required programming file, embedded software file, or *.bin file into the Flash memory, the memory must first be cleared. To erase the entire Flash memory, press the Erase Entire Device button, in the Erase region of the In System Flash Memory Controller For Xilinx Spartan-3AN dialog. The erasing process will proceed, with progress reflected in the Status bar, after which a confirmation dialog will appear.
Confirming full memory erasure.
Controls are also available for erasing a particular sector of memory. The In-System Flash memory is organized into 16 sectors. Each sector contains 256 pages, and each page is 528 bytes wide. Therefore each sector is 135168 bytes (or 132Kbytes).
Simply use the available drop-down to select the sector you wish to erase (or enter the sector number directly) and then click the Erase Sector button. Erasure will proceed, after which time you will receive a dialog to confirm completion of the erase.
Confirming sector erasure.
To verify that the memory has been successfully erased, press the Blank Check button. The verification process will proceed, after which time you will receive another confirmation dialog.
Verification of memory erasure.
Downloading to the Flash Memory
Once the Flash memory has been erased, the FPGA programming file, embedded software file, or .bin file can be downloaded. From the Download region of the In System Flash Memory Controller For Xilinx Spartan-3AN dialog, press the ... button to the right of the File Name field. The Choose FPGA Programming File Or Embedded Software File For Download dialog will appear. Use this dialog to browse to, and open, the required file.
After choosing the file and clicking Open, you will be returned to the In System Flash Memory Controller For Xilinx Spartan-3AN dialog. The chosen file (including path) will be displayed in the File Name field.
Chosen file ready for download.
To download this file to the Flash memory, simply click the Save File To Flash button. If you want to download to a specific area of memory, enter the required page address in the Memory Page Address field. The download process will proceed, with progress shown in Altium Designer's Status bar. At the end of the download an information dialog will appear.
Confirmation of file download to the Flash memory.
Verifying the Download
After you have downloaded the required file to the Flash memory, a check should be made to ensure the integrity of the file. To do this, simply click on the Verify against File button, in the Download region of the In System Flash Memory Controller For Xilinx Spartan-3AN dialog.
The contents of the Flash memory are read back and compared against the original file. Progress is again reflected in Altium Designer's Status bar. An information dialog will appear at the end of the process, providing details of the verification results.
Successful verification of downloaded file.
If the download process is shown to have failed, the dialog will report an error count. A large number of errors typically indicates that the Flash memory was not successfully erased prior to downloading the file. In this case, try erasing the device again – using the Erase Entire Device button – and then using the Blank Check button to verify that the device's memory has indeed been successfully erased. The required file can then be downloaded to the Flash memory again.
Generating a Bin File
When bootstrapping with a design that utilizes external memory for its embedded application code, both the programming file and embedded code file need to be downloaded into the In-System Flash memory. You will need to first create a .bin file from the relevant *cclk.bit and .hex files for the design project you wish to boot the User FPGA with. You can then download this bin file to the Flash memory using the relevant controls in the _In System Flash Memory Controller For Xilinx Spartan-3AN dialog.
To simplify the process, a bin-generation utility application is included in the installation – FlashUtility.exe. This executable file can be found in the \Examples\Soft Designs\Showcases\NB3000 Slideshow folder of the installation. Simply double-click the executable to access the FlashUtil dialog.
The Flash Utility enables you to quickly generate a .bin file containing the required .bit and .hex files.
Enter the name (including path) for the input .bit and .hex files, as well as the name (and path) for the .bin file that will be generated.
Your design may have more than one Hex file – for example a Hex file for code that is to reside internal to the FPGA and another for code that is to reside in external memory. When generating the .bin file, ensure that you specify the "external" Hex file.
In the Target Device region of the dialog, choose the target FPGA device, into whose Flash memory the .bin file will be downloaded. For the Spartan-3AN device on the NB3000XN or DB41, choose the NB3000XN User FPGA option.
With all fields/options defined as required, click the Generate Bin File button. The .bin file will be created with the specified name and stored at the specified location.
Setting the Auto-Boot Option for a NanoBoard
Altium NanoBoards can be setup such that the User FPGA is booted with a design when the board is powered-on. The source used for this auto-booting process – where the design is stored – can be one of the following:
- Dedicated Serial SPI Flash memory device (M25P80) on the motherboard.
- A stored example on an SD card inserted into the motherboard's SD card reader.
- A design stored in the User FPGA's internal Flash memory (where available).
Selection of the source for auto-booting (or not to auto-boot) is made from the Auto-boot region of the Firmware Options dialog, accessed by clicking the Settings button on the Instrument Rack – NanoBoard Controllers panel associated with the NanoBoard.
Choose the source from which to auto-boot the User FPGA (Dialogs shown pertain to a NanoBoard 3000).
To boot using a design stored in a Spartan-3AN's In-System Flash memory (the User FPGA on the NB3000XN or DB41), ensure that the option FPGA flash if available is enabled.