WB_SDCARD - Pin Description

Frozen Content

Modified by Admin on Nov 6, 2013

The following pin description is for the WB_SDCARD component when used on the schematic. In an OpenBus System, although the same signals are present, the abstract nature of the system hides the pin-level Wishbone interfaces. The external interface signals will be made available as sheet entries, associated with the parent sheet symbol used to reference the underlying OpenBus System.

Table 1. WB_SDCARD pin description.

Name	Type	Polarity/ Bus size	Description
Control Signals
CLK_I	I	Rise	External (system) clock signal
RST_I	I	High	External (system) reset. If this signal is active for at least one full cycle of the external clock signal (CLK_I), all internal registers will be reset.
Host Processor Interface Signals
STB_I	I	High	Strobe signal. When asserted, indicates the start of a valid Wishbone data transfer cycle
CYC_I	I	High	Cycle signal. When asserted, indicates the start of a valid Wishbone cycle
ACK_O	O	High	Standard Wishbone device acknowledgement signal. When this signal goes high, the Controller (Wishbone Slave) has finished execution of the requested action and the current bus cycle is terminated.
ADR_I	I	3	Address bus, used to select an internal register of the device for writing to/reading from.
DAT_O	O	32	Data to be sent to host processor.
DAT_I	I	32	Data received from host processor.
WE_I	I	Level	Write enable signal. Used to indicate whether the current local bus cycle is a Read or Write cycle: 0 = Read 1 = Write
SD Card Interface Signals
SD_DETECT	I	Level	Card Detection State. This signal is used to flag whether or not a card is currently inserted into the SD Card Reader: 0 -- No SD Card inserted 1 -- An SD Card is inserted The state of this signal line is directly reflected by the `detect` bit of the Card Detection register (CARD_DET(0)).
SD_PROTECT	I	Level	Write Protection State. This signal is used to flag the write status of the SD Card currently inserted into the SD Card Reader: 0 -- The SD Card is Read-only (write protect tab is in the 'locked' position) 1 -- The SD Card is writeable (write protect tab is in the 'unlocked' position) The state of this signal line is directly reflected by the `protect` bit of the Card Detection register (CARD_DET(1)).
SD_CMD	O	-	Serial Data Out. This data is sent from the host processor to the SD Card.
SD_DAT0	I	-	Serial Data In. This is data received from the SD Card, to be sent to the host processor.
SD_CLK	O	-	Serial Clock. This signal is generated by the Controller and is used to clock data in and out during communication with the SD Card.
SD_DAT3	O	Level	Serial Chip Select. Take this signal Low to enable communications with the SD Card. The level of this signal is controlled directly by the `cs` bit in the Control register (CTRL.1).