WB_INTERCON - Configuration

The WB_INTERCON component can be configured after placement on the schematic sheet. Simply right-click and choose the command to configure the device from the pop-up menu that appears (e.g. Configure U_INTERCON_MEM (WB_INTERCON) for a device with designator U_INTERCON_MEM). Alternatively, click on the Configure button, available in the properties dialog for the component.

The Configure (Wishbone Intercon) dialog will appear, as shown in Figure 1.

Figure 1. Configuring the structure of the Interconnect.

Use this dialog to add and define the slave devices that you wish to connect to the processor.

The main region of the dialog presents a spreadsheet-like listing of all slave devices that are currently added. For each device, the following information is displayed:

• Name

• Base Address (Hex)

• Address Assignment

• Decoder Address Width

• Data Width

• Interrupts

• Type.

For detailed information with respect to each of these fields, see Adding a Slave Device.
 

 
If you are using the WB_INTERCON component to connect to slave memory devices, ensure that the Master Address Size option is set to 32-Bit(Memory). If using the device to connect to slave peripheral I/O devices, ensure that this option is set to 24-Bit(Peripheral I/O).

When connecting to slave peripheral devices, one or more of those devices may generate interrupts, the number of which can be configured separately for each device, appearing as additional sn_INT_I inputs for the relevant slave interfaces. If the connected slave devices do not use all of these available interrupts, you can specify what is to happen to the remainder using the Unused Interrupts option. The available options are:

• Add SPARE INT input pin – use this option to make the unused interrupt signals available as an additional input pin. Interrupts from additional circuitry in the design can be wired into this pin.

• Connect to GND – use this option to internally connect all unused interrupts to GND. The interrupt output signal pattern that is sent to the Wishbone Master device will contain '0' for each of these unused interrupts.

• No Interrupt output pin – use this option to effectively disable marshalling of interrupts to the processor. Any configured interrupt input pins for slave devices will be removed from the symbol, as well as the spare interrupts pin (where applicable) and the output pin to the Wishbone Master.

Adding a Slave Device

To add a slave device to the WB_INTERCON, simply click on the Add Device button in the main Configure (Wishbone Intercon) dialog or choose Add Slave from the dialog's right-click menu. The Device Properties dialog will appear (Figure 2).

Figure 2. Defining the interface properties for a connected slave device.

Use the dialog to define properties of the slave device as required. After clicking OK the device will appear in the main list region of the Configure (Wishbone Intercon) dialog and the schematic symbol for the device will be updated accordingly, to include an additional Wishbone interface for this slave device.

The following sections explore each of the various regions of this dialog, which collectively define the interface to the slave device being connected.

Slave Name and Type

This region of the dialog allows you to assign a unique identifier for the slave device being connected. The name should be meaningful so that you can readily identify the device when listed alongside all other connected devices in the main Configure (Wishbone Intercon) dialog. The identifier is also used when configuring processor address space and importing slave device address information from the schematic.

Use the Type field to define what type of slave Wishbone device is being connected. Choose from the following:

• Peripheral

• ROM

• RAM - Volatile

• RAM - Non-Volatile.

• ASP

Address Bus Mode

This region of the dialog allows you to specify the addressing mode employed when mapping the address line between the master (m0_ADR_I) and a slave (sn_ADR_O) connected to the interconnect component. Two modes are available:

• Word Addressing – ADR_O(0) <= ADR_I(1 or 2)

• Byte Addressing – ADR_O(0) <= ADR_I(0)

In byte addressing mode, all of the lower address lines are passed to the slave, no matter what the resolution of its data bus. The slave device will handle "byte-to-word" management.

In word addressing mode, the mapping of the address lines is dependent on the resolution of the slave device's data bus width:

• 32-bit wide devices – the two lowest address bits are not connected to the slave device. ADR_I(2) from the master is mapped to ADR_O(0) of the slave, providing sequential word addresses (or addresses at every 4 bytes). Registers/address locations in such devices can be read and written using the LW and SW 32-bit load/store instructions

• 16-bit wide devices – the lowest address bit is not connected to the slave device. ADR_I(1) from the master is mapped to ADR_O(0) of the slave, providing sequential half-word addresses (or addresses at every 2 bytes). Registers/address locations in such devices can be read and written using the LHU and SH 16-bit load/store instructions

• 8-bit wide devices – all address bits are connected through to the slave device. ADR_I(0) from the master is mapped to ADR_O(0) of the slave, providing sequential byte addresses. This is identical to byte addressing. Registers/address locations in such devices can be read and written using the LBU and SB 8-bit load/store instructions.

Address Base

This region of the dialog allows you to specify a decoder base address for the slave device. A designated portion of this address – specified by the Decode Addressing value – will be compared against the corresponding bits of the incoming m0_ADR_I signal, to determine whether the slave is being addressed by the processor or not.

For a slave memory device, the address base is a 32-bit hexadecimal number, entered as 8-digits. For a slave peripheral device, it is a 24-bit hexadecimal number, entered as 6-digits.
 

Decode Addressing

This region of the dialog enables you to define decoder address width. The value entered determines the number of upper address bits on the m0_ADR_I line that are decoded to select the correct slave device. This value therefore also determines the number of slave devices that can be connected to the interconnect component.

Considering a bank of slave peripheral devices, a value of 4 would mean that m0_ADR_I(23..20) would be compared against the upper 4 bits of the 24-bit values defined for each peripheral's Address Base.

For a bank of slave memory devices, with 32-bit addressing, a value of 4 would mean that m0_ADR_I(31..28) would be compared against the upper 4 bits of the 32-bit values defined for each device's Address Base.

The decoders are generated automatically. Using a smaller number of bits for comparison will lower the hardware overhead, but also limit the number of slave devices that can be used. The optimal scenario would be to make the decode address width as small as possible while allowing enough slave devices to be added to the interconnect component, in accordance with design requirements. For example, if you need to use an interconnect component to connect to 8 peripheral devices only, set the decode address width to 3 and define the Address Base values for the peripherals to provide an even spread through the 16MB of Peripheral I/O space. 3-bit comparators will be generated to perform the decoding.

Table 1 illustrates this example, showing the comparison bits (upper 3 bits of peripheral Address Base), to which the upper 3 bits of the incoming address from the processor (m0_ADR_I(23..21)) will be compared.

Table 1. Example decode addresses for a bank of slave peripheral devices.

Peripheral Device	Address Base (6-digit Hex)	Comparison bits
1	000000	000
2	200000	001
3	400000	010
4	600000	011
5	800000	100
6	A00000	101
7	C00000	110
8	E00000	111

Note: The Decode Addressing value determines the number of devices that can be connected as follows:

• for 8-bit devices – entering a value n allows for 2 ⁿ devices

• for 16-bit devices – entering a value n allows for 2 ^n-1 devices

• for 32-bit devices – entering a value n allows for 2 ^n-2 devices.

Address Bus Width

This region of the dialog allows you to specify the number of address bits required to drive the connected slave device. For slave memory devices – which are connected via the appropriately configured Memory Controller device – you need to set the address bus to the same width as the ADR_I line for the Memory Controller. The Memory Controller will automatically size its ADR_I line according to the size of the physical memory it is connecting to.

For slave peripheral devices, you also just need to set the address bus to the same width as the ADR_I line for the peripheral.

Data Bus Width

This region allows you to specify the resolution of the data bus for the slave device being connected. 8-bit, 16-bit and 32-bit data bus widths are supported.

Used Interrupts

This region allows you to specify how many, and more precisely which, of the processor's interrupt pins the slave device requires. By allowing you to specify which interrupt line you wish to use, you are effectively determining the priority of interrupt-generating devices connected to the Interconnect device.

Click on the ... button to the right of the available field to access the Use Interrupts dialog (Figure 3).

Figure 3. Specifying interrupt usage.

This dialog allows you to choose which interrupt(s) to use for the slave device in question, simply by checking the box to the left of the required interrupt pin number(s). The dialog will display which interrupt lines are currently in use by other slave devices connected to the same Wishbone Interconnect component, helping to prevent multiple use of the same line(s).

For each interrupt line, you can also define its type – whether it is level-sensitive or edge-triggered – as well as its polarity. Interrupts generated by Altium Designer Wishbone peripheral devices have positive polarity and are level-sensitive, and this is therefore the default setting.

You can also specify the required interrupt pins to be used by directly typing within the available text field – in the Device Properties dialog. The entry required will depend on how you want the interrupt configured and whether multiple interrupts are required:

• Level-sensitive, positive polarity (default) – enter the number (e.g. 1 for interrupt line 1).

• Level-sensitive, negative polarity – enter the number with a '-' prefix (e.g. -1 for interrupt line 1).

• Edge-triggered, rising edge – enter the number with an 'E' prefix (e.g. E1 for interrupt line 1).

• Edge-triggered, falling edge – enter the number with an '-E' prefix (e.g. -E1 for interrupt line 1).

• To specify multiple interrupt pins, separate the entries with a comma (e.g. 2,3,4 or E1,-E2,-3).

Any defined interrupts will appear as part of the overall 32-bit interrupt input bus sent to the Wishbone Master (e.g. a 32-bit host processor).

Graphical Attributes

This region of the dialog enables you to alter the amount of blank space that is inserted after the bank of pins for the slave currently being defined. This allows you to space the slave interfaces appropriately, so that each slave device can be directly connected to its corresponding interface, without the need for additional external wiring.

Editing a Slave Device

To edit the definition of an existing slave device that is connected to the WB_INTERCON, simply select the entry for that device in the main list region of the Configure (Wishbone Intercon) dialog and click on the Edit Device button or choose Properties from the dialog's right-click menu. The Device Properties dialog will appear, from where you can make modifications as required.

Removing a Slave Device

To remove an existing slave device that is connected to the WB_INTERCON, simply select the entry for that device in the main list region of the Configure (Wishbone Intercon) dialog and click on the Remove Device button or choose Remove Slave from the dialog's right-click menu. A dialog will appear asking for confirmation to proceed with the deletion. Clicking Yes will remove the device entry from the main list and also remove the Wishbone interface for that slave from the schematic symbol for the device.

Changing Slave Interface Ordering

After defining the slave device interfaces, you may find when connecting the actual slaves that you want to place them in a different order, in terms of connection to the WB_INTERCON component. Rather than having to delete and re-add device definitions, or rely on less-than-desirable wiring to achieve your goal, support for slave interface re-ordering is provided through two additional buttons in the main Configure (Wishbone Intercon) dialog – Move Up and Move Down. Simply select a slave device entry in the main list region of the dialog and use these buttons to change its corresponding interface position on the WB_INTERCON's schematic symbol.