WB_I2S - Transmitter and Receiver Reset
Frozen Content
The Transmitter section of the Controller can be reset in the following ways:
- Upon a global reset (RST_I = '1')
- If the Transmitter Enable bit –
txen
– in the Mode register (MODE.11) is cleared.
After a reset, the valid data in the Transmit FIFO will be cleared, the Transmit Shift register will be cleared (000000h) and the output on the SDO line will be '0'.
The Receiver section of the Controller can be reset in the following ways:
- Upon a global reset (RST_I = '1')
- If the Receiver Enable bit –
rxen
– in the Mode register (MODE.12) is cleared.
After a reset, the valid data in the Receive FIFO will be cleared and the Receive Shift register will also be cleared (000000h).