Accessing SPI Flash Memory Attached to a Processor

The NanoBoard NB2 and 3000-series NanoBoards all feature SPI Flash memory that can be programmed with a design for boot purposes – downloading that stored design to the User FPGA when the board is powered. Getting your design inside the Flash memory is made a breeze, with Altium Designer providing an intuitive interface catering for memory erasure, programming and download verification.

Use of an SPI Flash memory device on a NanoBoard is one thing, with the SPI communications in place to be able to readily 'see' and 'interact' with the device courtesy of the Host Controller FPGA (NanoTalk Controller). However, when it comes to a prototype hardware system, resident on your own development/production board, there is no NanoTalk Controller to 'pave the way' as it were, to an SPI Flash device. So just how do you get at the Flash device, without the monumental task of reproducing a NanoTalk-like system on your board?

Altium Designer supports the ability to write to a parallel Flash memory device, or SPI Flash memory device, attached to a processor in a design. In terms of the latter, this enables you to empower your hardware systems with bootstrapping capabilities, confident that such capability can be implemented in a streamlined and intuitive fashion – all through Altium Designer's unified environment.

Accessing Flash Memory Controls

Prior to communications with the Flash memory device attached to the processor in your design, ensure that the FPGA design has been downloaded to the target physical FPGA device on your board and that the embedded code is currently running on a processor therein.

The command for interacting with the Flash memory device is accessed by right-clicking on the icon for the processor, and choosing the Write To Flash command. This command provides access to the Flash Memory Controller dialog, providing all the necessary controls to erase and program the Flash memory.

The dedicated Flash Memory Controller dialog provides a detailed GUI to the Flash memory attached to the processor.

Flash Information

This region of the dialog is used to specify the Flash memory device that you wish to write to. The information is automatically populated, based on the definition for the connected peripheral in the processor's address space. If there is more than one SPI Flash device connected to the processor, or there are both SPI Flash and parallel Flash devices connected, simply use the drop-down fields to select the relevant device accordingly.

Erasing the Flash Memory

Before loading the required programming file, embedded software file, or *.bin file into the Flash memory, the memory must first be cleared. To erase the entire Flash memory, press the Erase Entire Device button, in the Erase Flash region of the dialog.

Controls are also available for erasing a particular sector range or address range of the memory. Simply use the available fields to specify a start and end point for the range, then click the Erase Sector Range or Erase Address Range button respectively.

In each case, erasure will proceed, with progress reflected in a bar at the bottom of the dialog.

To verify that the memory has been successfully erased, press the Blank Check button, in the Utility region of the dialog. You can optionally specify a sector range to check.

Downloading to the Flash Memory

When bootstrapping the target FPGA on your board with a pre-built design, the SPI Flash memory is used to accommodate the FPGA programming file. For a simple design that does not utilize code stored in external memory, this file is all that needs to be programmed into the Flash memory. Upon power-up, the FPGA programming file is automatically downloaded into the target FPGA, while the embedded code is downloaded along with the design and located into the FPGA's Block RAM.

For a design that makes use of application code stored in external memory, the relevant embedded application code (Hex file --- *.hex) must also be programmed into the Flash memory. In this case, the bitstream file and Hex file are typically combined together into a .bin file. Upon power-up, the FPGA programming file is automatically downloaded into the target FPGA. What happens with the embedded application code depends on the type and location of memory used by a processor in your design:

• Internal Memory usage --- this code is downloaded as part of the bitstream file to the target FPGA (and is destined to reside in internal Block RAM).

• External Memory usage --- this code needs to be loaded into independent SRAM accessible by the target FPGA.

In the case of the latter, this is performed by having a Flash SPI Bootloader component (WB_BOOTLOADER_V2) in your design. The bootloader component provides the interface between the Flash memory and the SRAM. Provided the device is enabled for boot operation (by taking its ENABLE line High), then as soon as the design is programmed into the target FPGA (or an external reset is issued if already programmed) the embedded application code --- Hex file stored in the Flash memory --- will be copied into the SRAM.

Once the Flash memory has been erased, the FPGA programming file and/or embedded software file, (or .bin file) can be downloaded. Download controls are all available in the Write Flash region of the dialog.

There are essentially two methods of download:

• Download current project – which will download the code file for the current embedded project. The bitstream will be programmed starting from the Flash device's base address.

• Download file – browse to, and specify a specific file, for example an embedded code file (Hex file --- *.hex). You are able to specify the target memory address from which to start writing from.

Specify any additional options, such as verifying the write, or preserving lead/trail data. By default, the Flash device will be reset. Once the write options are defined, press the Download to Flash button to effect the write. Progress is again reflected at the bottom of the dialog. To stop the write, click the Abort button.

To manually verify the download once complete, click the Verify against Flash button.