Overturning conventional priorities for software improvements, Altium Designer 6.8 demonstrates a continued commitment for responsiveness by producing an extensive range of new features and productivity enhancers to help you deliver on real world deadlines. These latest improvements include a DxDesigner Importer for working with and importing data from external systems, and a host of new board layout capabilities. More innovative products within shorter timeframes - Altium Designer again pushes the boundaries of electronic product design with this release.

Physical platform design has been expanded to support the high-speed signaling found in today's designs. Interactive Length Tuning for Differential Pairs brings a new level of intelligence and power to your hands during the routing process. Polygon definition, placement and editing make board design layout more flexible. True Type characters have expanded display modes for inverted text, as well as the ability to paste metafiles into your designs.

Altium Designer 6.8 includes a significant improvement to importing designs from DxDesigner ^® , further easing the translation process from other systems. Improved zooming, selection and reposition of objects across the editors accelerate the fundamentals of design creation, and increase your productivity.

These are just a few of the new features in what we believe to be an exciting new release of Altium Designer. Based directly on feedback from you, the engineers and designers developing designs, Altium Designer 6.8 helps you keep pace with the speed of today's development!

Take Five and Update your Skills - Altium Designer Training Videos

Whether you are new to Altium Designer, or have recently upgraded to the latest version, you'll want to maximize your productivity and get the most out of your investment by knowing the best way to approach design tasks and challenges. Altium's recently launched TRAININGCenter now contains over 100 short videos to provide you with in-depth and practical discussions on everything from The Altium Designer environment to How to get help are featured. Each video is designed to provide you with easy and immediate access to specific training in key areas of the product and with a running time of around 5 minutes, they don't require a significant time commitment on your part. So grab yourself a cup of coffee and have a seat - these videos are made for you!
http://www.altium.com/Community/TRAININGcenter/TrainingVideos/

New - PCB Visualization

Today's designs demand tools that make it easier to view your designs - some things are just easier to see and jump out at you when you see the real thing! Taking advantage of DirectX capabilities, PCB Visualization brings powerful new capabilities that allow you to customize and configure your design view for both 2D and 3D displays so that you can inspect and edit objects such as pads, via barrels, tented vias both on the surface and internally from a 3D perspective.

Figure 1.You can save different viewing configurations for later use at any time, and even on other systems that have Altium Designer 6.8. Here we see that we can preview different material specifications of the same board before committing to manufacturing.

Whether you are a Board Layout Specialist or an Embedded Engineer, being able to understand more easily what you are creating will help you leverage the most of your time, and get your design right the first time.
PCB Visualization includes a number of new dialogs and panels, including an updated View Configurations dialog (accessed from either Design » Board Layers & Colors, or shortcut 'L'). Additionally, a number of new shortcut keys and tool tips facilitate zooming in and rotating your design while working between different views.

3D Visualization Panel

A new panel for the PCB editor, the 3D Visualization Panel provides up to three simultaneous 3D views. Different views are available - an A-A cross section, a B-B cross section, and a more general purpose 3D Board Insight. Opacity levels to control how much detail you wish to see can also be defined.

Figure 3. Launched from the Panel access controls, the 3D Visualization panel works with the main view in either 2D or 3D. Cross section (A-A and B-B) lines can be displayed in the main view as shown here.

Display Configurations Saved on a Board by Board Basis

Figure 2. For 2D view you can have different show and hide primitive settings, convert special strings, flipped board, test points display, single layer modes and more

2D and 3D View Configurations can be created, saved, reloaded, and displayed differently across boards open in your workspace - providing finer control over the display than was previously possible and allowing multiple PCBs to be open with different view configurations. Configurations can be stored either with the PCB or even transferred as files to another PC that has Altium Designer.

3D View Configurations­ - Materials-Based Color Settings

You can setup the colors of the workspace and copper on the board through the 3D View Configurations. Opacity and color setting can be specified for Solder Masks, the Stackup (both Core and Prepreg), and Silkscreen. An additional option Show Component Bodies is available for when suitable 3D models are in the libraries. A new 3D color attribute when adding component bodies to footprints in the PCB library allows you to set its coloring when displayed in 3D.

Load/Save of View Configurations for both 2D and 3D Views

View configurations are easily loaded and saved when they have been modified. This includes 2D Simple Configurations (.config_2dsimple), and 3D Configuration (.config_3d) as shown here.
It's worth noting that if you customize your view configurations, the changes will be lost unless you save them.

Main View in 3D or 2D

Figure 4. You can control the color of component bodies for 3D - double-click and edit the 3D visualization color through the Component Bodies Property.

Your main view is able to show both 2D and 3D at the same time. Switching between 2D and 3D is easy with shortcuts - press '3' to switch to the last 3D view from a 2D view; press '0' to flatten (this rotates the 3D view so the camera perspective is perpendicular to the board). SHIFT + Right-click + Drag from the 3D sphere (described later) rotates your 3D view. DirectX must be enabled in your PCB Preferences before 3D can be seen.

Choosing a View Configuration

A new Select View Configuration section to the View Configurations dialog enables you to easily choose and change configurations. Launched from Design » Board Layers & Colors (or shortcut key 'L') this dialog gives you control over many viewing options for the PCB, helping you visualize the board at different stages of the design. From showing and hiding primitives and layers in 2D, to displaying solder masks in different colors, you can achieve views that suit the perspective you need. Even setting the opacity level of the core to inspect pad and via barrels on internal layers can be achieved.

Load/Save of 2D System Color Profiles

You can load and save Color Profiles which store 2D system color settings. Previous Default, Classic and DXP 2004 preset Color Profiles are found here for you to choose at anytime.

Animated Board Flip Maintains Position Context

Precision smooth ability to flip a board in 3D and relocate to the other side of the board enables you to see exactly what is beneath the cursor on the other side of the PCB.

New - Fast Mouse Zoom and 3D Sphere

It's important to have efficient and intuitive control over your design view, especially during intensive interactive processes such as placement and routing. New Fast Mouse Zoom for both 2D and 3D views extends the control over the design in both the schematic and PCB editor. Mouse Zoom can be used independently or in conjunction with panning, giving you maximum control when you need it most.

To use as an accelerated zoom capability, hover the cursor over a desired object and click and hold down the mouse wheel and a magnification icon will appear. Dragging the mouse then zooms the design view in or out. To use with panning, click and hold the right mouse button to activate panning mode (the cursor will change to a hand to indicate this). Selecting the CTRL key then activates Mouse Zoom to work in concert with panning.

To facilitate navigating in 3D mode, a 3D sphere appears by pressing the SHIFT key enabling you to control and rotate the board in 3D space. Horizontal and vertical direction arrows positioned allow you to lock into a set navigational direction. For example, to rotate the board horizontally about the Y-axis, right-click the mouse over the left or right arrow. The arrows highlight when they become active as you pass over them.

New - Support for 3Dconnexion ^® Devices

Figure 7. The 3Dconnexion Control offers the exact configuration for your navigation needs, making it easy to drive in Altium Designer 6.8.

Designed as a compliment for 3D PCB Visualization, Altium Designer 6.8 includes driver support for the SpaceNavigator - a 3D mouse from 3Dconnexion, the latest in next generation navigation devices.
When combined with the real time graphics of PCB Visualization, you can experience the freedom of being able to reach directly into your display and explore your design in a visually rich 3D world.
Once you've installed the drivers that come with the SpaceNavigator, ensure that you have the Use Direct X if possible option enabled in the PCB Editor Display Preferences for any 3D capability.

New - Paste Metafile

The generation of design documentation for mechanical layers is easily accomplished with Paste Metafile, new enhanced clipboard metafile capabilities. Using the same Windows Paste command that you are used to (CTRL + V), any metafile data from the clipboard is pasted automatically to the PCB editor.

Figure 9. Tables, paragraphs of text and simple diagrams created in Microsoft ^® Word or Excel can be brought into the PCB Editor for all of your design documentation needs.

Supported metafile data includes bitmaps, lines, arcs, simple fills, and true type text - allowing you to easily paste logos and other graphical symbols. Imported data will be put onto the current layer, adopting the color you have chosen for that layer. After pasting, resize handles let you fine-tune the size (union) of the paste image. Unions resulting from a paste can be resized at any time using the Resize Union command from the context sensitive right-mouse menu.

Improved - Interactive Length Tuning for Differential Pairs

Interactive Length Tuning, introduced in Altium Designer 6.7, allows for a more dynamic means of optimizing and controlling net lengths by inserting variable amplitude patterns according to the available space, rules, and obstacles in your design. Launched from the Tools menu, it can be based on design rules, properties of the net, or values you enter into a dialog (press TAB to open dialog while interactively length tuning).
With 6.8, it's now possible to length match differential signals. MatchedLengths rule improvements in the PCB Rules and Constraint Editor allow for timing checks on multiple differential signals as well as the positive and negative traces within an individual pair. In a similar fashion to the single-ended format, the target length can be driven either from rules, from another pair or manually.

Figure 8. Clicking on the routed differential pair as you move the mouse along will add tuning segments while a graphical gauge indicates how close you are to ideal lengths.

Improved - Visible and Electrical Grid Enhancements

Appreciating that you may have to change through a large range of snap settings during the board layout process, the Visible and Electrical Grid options can now be set relative to the Snap Grid - offering an excellent visual cue of your current snap setting.

New - Inverted Text Options

Available in the String properties dialog of the PCB editor, new options for inverted text that use TrueType fonts allow you to define various properties of the bounding rectangle whereby the inverted text displays instead of the inverted text border.

Figure 11. The different types of justifications are displayed here. In addition, a graphical resize handler allows you to interactively change the size of the inverted text rectangle after it has been placed.
Potential conflicts between inverted texts and polygon fills can be avoided as greater flexibility is achieved for multiple text blocks that need to be overlapped with other objects or silk blocks, or are the same size at the time of Gerber generation - ensuring that what you see in the Gerber is the same as what is in the PCB editor.
Additional options for greater display flexibility available in this dialog include:

• Inverted Size (Width/Height) - allows you to set the width and height of the bounding rectangle.
• Justification - allows you to determine how you would like your text justified with the bounding rectangle.
• Inverted Text Offset - allows you to determine how far the inverted text will sit from the bounding rectangle edge.
  Inverted text for TrueType fonts behaves identically to normal text with respect to how design checking is performed (according to the bounding rectangle).
  

New - Place Barcode Text

Barcodes are commonly used to tag and identify PCBs. Altium Designer 6.8 allows you to place barcode symbols directly onto a PCB on any layer, allowing barcodes to be easily imprinted on a PCB as part of the manufacturing process.
Launched from Place » String, a new option exists in the String dialog. Simply enter or paste text in as per usual and enable this option. The new Inverted Text Options (described earlier) can be used as well, including Render Modes and positioning of inverted text within the rectangle.

New - Place Board Cutouts

Board Cutouts are a new capability for the PCB editor and allow a Region to display a Board Cutout. A new option in the Place » Solid Region dialog allows you to enable this feature.
Board Cutouts are supported for fabrication as well. Board cutout routing paths are outputted both in Gerber and ODB++.

New - Option for Component Reference Point

A new PCB editor display option in the View Configurations dialog (accessed from either Design » Board Layers & Colors, or shortcut 'L') lets you decide how to display a component's reference point. A secondary option even lets you pick the color for greater visibility in your design.

New - Reposition Selected Components

Placement of components during board layout just got a lot easier with new Reposition Selected Components. Launched from Tools » Component Placement » Reposition Selected Components in the PCB editor you can reposition the selected components one by one, in the sequence they were selected.

Figure 14. Reposition selected components is also compatible with and supports the cross-select functionality between the schematic and PCB editors.

New - Define Polygon Shape from Selected Objects

You can create company logos or polygons easily from external sources (i.e., DXF or AutoCAD ^® ) using Define a polygon from selected objects in the PCB Editor.
Polygon shape definition is a two-step process. First you select the objects within the PCB editor and then launch Tools » Polygon Pours » Define from selected objects to define a polygon fill. Right-click on the fill and selecting Properties will then allow you to specify the Fill Mode (Solid, Hatched, or None) as shown here.

Expanded - Polygon Placement and Editing

The improved placement and editing of polygon outlines introduced in 6.7 has been expanded to include all polygon objects. Regions, Cutout Regions, Component Bodies, Polygon Rooms and Board Outline now offer the same easy and precise placement as the interactive routing tools.

Figure 15. The ability to place and slide orthogonal edges, and corner re-mitering (Edit » Move » Polygon Vertices) including arcs can be done with all polygon objects.

Expanded - Live Highlighting for Board Insight

Board Insight has been expanded to include new Live Highlighting of the design. Live Highlighting allows you to highlight Nets, Net Classes, Differential Pairs and Components simply by placing the cursor over the appropriate object. Default settings for Live Highlighting can be changed through Tools » Preferences in the Board Insight Display page. Live Highlighting can be configured to be active only when the SHIFT key is pressed.

Figure 16. Live Highlighting works with the masking capabilities in Altium Designer. Holding down the ALT
+ Click highlights components, CTRL
+ Double-click highlights Net Classes, and ALT
+ Double-click highlights a Component Class.

Objects initially placed under the cursor will highlight with 35% intensity. If the cursor remains over the same object, highlighting will increase intensity.

New - Signal Harnesses

Altium Designer 6.8 introduces a new way of establishing connectivity and reducing schematic complexity - called Signal Harnesses. Signal harnesses extend on bus and wire connectivity by allowing you to assemble logical groupings of any signals, greatly simplifying the wiring traffic, enhancing readability, and potentially streamlining the structure of your schematic design.
Using signal harnesses you can create and manipulate higher levels of abstraction between sub-circuits, effectively allowing for more complex designs to be represented with simpler drawings.

Figure 17. Harnesses carry multiple signals can include both busses and wires which are grouped and then referenced as a single entity. The multi-wire connection is called a Signal Harness.

The Elements of Signal Harnesses

There are four basic elements to harness construction, launched through the Schematic editor:

Signal Harness - represents the abstract connection that combines different signals. Used to connect different signal subsystems across your design, they can either link to other harnesses or represent the links between sheets. The signal harness acts the same as a bus object and can carry different signals as a single wire between harness connectors on different sheets.

Harness Connector - combines the various signals together to form a Signal Harness. It is both a graphical definition and a graphical container that includes the actual nets, busses, and other harnesses to a main signal harness.

Harness Entry - the graphical definition of a signal harness member. It is also the logical connection point for any nets, busses, and harnesses that form a high signal harness. Each entry is linked to a specific connection.

Harness Definitions - the formal textual definitions of Signal Harness types. Stored in files (*.Harness) within your project file, they are used to understand harnesses at any level in a project.

Establishing Connectivity

While they can be used in flat designs, harness connectors are placed on different sheets in a hierarchical design. Connectivity is resolved by harness type which is a new field in the Port and Sheet Entry dialogs.
Harness Entries are the graphical representation of the individual entries that are combined together and represented as a Signal Harness. Once the graphical representation of a Harness has been defined, a signal harness system can be built using Place » Harness » Predefined Harness Connector. The Place Predefined Harness Connector dialog appears with a list of all available Harness Connectors in your current and open projects and in your declared Device Sheet folder.

Figure 18. Instances of Signal Harnesses can be created at any level in a project. Here we see two instances of the same JTAG-CONFIG Signal Harness Definition are used. These are defined on the top sheet and the naming convention is used to name nets on lower levels.

To explore this new feature in more detail, refer to the article Using Signal Harnesses

New - Device Sheets

Implementing design reuse as a strategy in your development cycle makes a lot of sense - faster turnaround times and higher levels of quality are more easily achieved without having to recreate designs from scratch. Much of the hard work is essentially eliminated, and engineers are allowed instead to develop and fine-tune the real improvements, rather than spend considerable time on locating, rewiring, and verifying circuitry. New Device Sheets allows you to incorporate this powerful capability into your development cycle and help bring your designs to market faster.
Device Sheets begin with creating and storing verified circuitry to quickly build-up resources of proven designs that can be used at any time. They are then readily accessible to save time without having to search through folders on the hard drive or open individual schematics to find what is needed, or verify that it works. Sharing proven designs in this manner means that a development team can have resources at their fingertips without the effort involved in researching a solution to see that someone else has already come across it.
Device Sheets are stored as normal schematic documents in special Device Sheet Folders. They are placed and referenced in your project, similarly to a simple component. Once the project is compiled, Device Sheets are included in the project hierarchy and can be distinguished from schematic documents by a different schematic document icon in the Projects panel.

Figure 19. Device Sheet Folders contain all of the Device Sheets available across your projects. When Device Sheets are placed in your project, they are given a unique schematic document icon to differentiate them from normal schematic documents. One Device Sheet can be used across multiple projects.

Creating and Placing Device Sheets in your Project

A Device Sheet can be any normal schematic document including schematic documents with sheet symbols. You must first declare a Device Sheet through DXP » Preferences » Schematic » Device Sheets under the Schematic folder. Device Sheets, by default, are read-only unless you change this through Preferences. Once editable, any changes are saved back to your source document.

Placing Device Sheet Symbols in your Project

Once Device Sheets have been saved and their location declared, Device Sheet Symbols representing your Device Sheets can be placed in your project using the Place » Device Sheet Symbol command. After the Device Sheet Symbols have been placed in your schematic documents, they act in the same way as standard sheet symbols but have different graphical properties indicating that they reference a Device Sheet.

Figure 21. The recycle symbol indicates this sheet symbol references a Device Sheet and can be reused within and across projects.
To explore this new feature in more detail, refer to the new application note Using Device Sheets

New - Board Level Annotation

Designs that use repeated channels or device sheets create a challenge in terms of how to manage repeated component designators. New Board Level Annotation provides a method of ensuring that logical components remain uniquely identified and in sync through all phases of multi-channel design and when using Device Sheets. Logical components remain related to their physical implementations, and can be easily reannotated, or default naming schemes changed.
When launched from Tools » Board Level Annotate in the Schematic editor, Board Level Annotation is performed. A new compiled documents view that shows the physical names of the components opens up. Display options can be enabled to show the source (logical) component names in superscript should you require them.

Figure 22. Filtering Options in the left pane will filter out components that you don't want to see. Undesignated components are shown here with question marks.
The annotation scheme can be specified through the Board Level Annotate Options dialog which is launched from this dialog. New Editor and Compiled Documents tabs in the main design window offer views for both source and compiled projects. For multi-channel designs, there is one compiled document per channel. If there are no channels in your design, there is only one compiled document per schematic document.

Figure 23. The Editor tab is the only tab you will see when you first open a project. You have to compile your project to view Compiled Documents.
For more information on board annotation and annotation in general, refer to the application note Understanding Design Annotation

Improved - Sheet Entry Editing

Appreciating that you need efficient editing capabilities for faster turn-around on designs, placing and moving sheet entries has been made more intelligent. Sheet symbols no longer need to be pre-selected prior to placing, and sheet entries can be easily moved from symbol to symbol in the schematic document.

Figure 24. Visual indicators help you identify whether you are making correct placement or not. Blue (top image) indicates correct placement while gray (bottom image) indicates incorrect.
The appearance of sheet entries can be further customized with the Sheet Entry dialog. New graphical shapes for sheet entries have been added and sheet entry texts can also be tailored.

Figure 25. Here we see how text can be customized. On the left side, the font is enlarged and set to Bold and Italics while the font on the right side the default font is used with the text style set to show the bus prefix (in this case without any width).

New - Move Selected Object with Arrow Keys

Perhaps the single thing most needed for productivity in any design environment is to have repeatedly-used commands or capabilities readily available. Controlling objects in both the schematic and PCB editors has been enhanced to allow you to select and move them by increments using only the arrow keys. Simply select one or more objects in a document, then hold CTRL key and press the Arrow keys to relocate the selected objects.

Improved - Schematic Library Editing

Editing the designator and comments in components in schematic libraries can now be done on the fly. A new option to make these visible and interactively editable must be enabled first - launch the Library Editor Workspace dialog by right-clicking in the workspace and then selecting Options. From here you can change the font, move, rename or edit them.

New - Publish to PDF

A new way to setup and generate output jobs to PDF for both PCB and schematic has been introduced with Publish to PDF. Publish to PDF allows you to build custom PDF documents from the OutputJob Editor. Any number of Schematic, OpenBus, PCB and PCB3D outputs including all printable Assembly Drawings, Documentation Outputs and Fabrication Outputs can be combined together into a single document.

Figure 27. You can build custom PDF documents from a number of different source files that can be configured to include both logical and physical representations of your design as well as different page sizes and orientations.

PDF bookmarks are created for each output and all of their corresponding components, nets, pins and ports. Output Job Files, through their portable nature can be defined once and used in multiple projects allowing you to reuse PDF Setup and Schematic Print Properties. This process can also be automated using scripts without having to manually select items in the OutputJob Editor.

Step by step instructions for getting up and running with this feature are found in the new output guide Publish to PDF

New - Protect Locked Objects

Preventing schematic objects on a schematic sheet from being inadvertently moved or edited is ensured with a Locked property through the Schematic Inspector.

Figure 28. Protect Locked Objects is enabled through the schematic preferences (Tools » Schematic Preferences)

New - SIMetrix/SIMPLIS ^®

Altium Designer 6.8 now supports Catena software's popular SIMetrix/SIMPLIS ^® circuit simulation package. SIMetrix/SIMPLIS is a combination of two independent circuit simulators: SIMetrix, a SPICE-based simulator with numerous enhancements including extra models for power transistor devices, and SIMPLIS, a fast simulator that uses piecewise linear approximations and includes useful analysis modes for switching power supply circuits. A license to run SIMetrix/SIMPLIS (release 5.3j or higher) is required to use this feature.

Altium Designer supports SIMetrix/SIMPLIS in three main ways:

• Direct simulation from Altium Designer in SIMetrix/SIMPLIS
• Importing models from the SIMetrix/SIMPLIS model library
• Exporting schematics containing simulation models to SIMetrix/SIMPLIS format.
  Before you begin you will need set up the location of your SIMetrix/SIMPLIS installation by selecting DXP » Preferences, then clicking on Simulation » SIMetrix Interface. This preferences page lets you choose whether to view the results of your simulations in SIMetrix/SIMPLIS or in Altium Designer.

Figure 29. Simulation-SIMetrix Interface options allow you to decide how you would like to display your graph results.

Two new menu commands will then appear: Design » Simulate » SIMetrix and Design » Simulate » SIMPLIS.
Most simulation models from Altium Designer's libraries can be used in SIMetrix/SIMPLIS, but you can also import models from the SIMetrix/SIMPLIS model library into Altium Designer. Altium Designer lets you mix and match the different model types. If you have multiple models for a component that have been tuned for each simulator, then you can attach them all to the component. Whenever you run a simulation, Altium Designer will choose the best one for your target simulator.
To export your Altium Designer schematic to SIMetrix/SIMPLIS format, launch File » Export File to SIMetrix. This is particularly useful when you want to run many simulations in SIMetrix/SIMPLIS or use multi-step analysis modes that are not directly supported in Altium Designer.
To get started with this feature, refer to a new application note Using SIMetrix SIMPLIS Circuit Simulation
For more information on SIMetrix/SIMPLIS, refer to the Catena website.

Figure 30. To run a simulation in SIMPLIS, select the Design » Simulate » SIMPLIS command.

New - DxDesigner* ^® Importer

Translating complete DxDesigner designs, including schematics and library files can all be directly imported by having Altium Designer's Import Wizard without having to convert to an intermediary format - thus avoiding the need for having DxDesigner installed. Such files will be converted into Altium Designer schematic documents (.SchDoc) - one schematic document per sheet defined within the Logic file - and added to a PCB project (.PrjPcb).
The Import Wizard (File » Import Wizard) removes much of the headache normally found with design translation by analyzing your files and offering many defaults and suggested settings such as project folders, project links to other libraries, drawing styles, and output project structure.
Complete flexibility is found in all pages of the wizard, giving you as little or as much control as you would like over the translation settings before committing to the actual translation process.
The following versions of DxDesigner files are supported: 2004 and 2005.
To get started with this Importer, refer to a new application note Moving to Altium Designer from Mentor Graphics DxDesigner

New - OpenBus System

Until now, processor-based FPGA design has been performed with all devices in the system layed out on a single schematic sheet. Such designs are inherently complex in terms of readability and, more importantly, from a wiring and configuration perspective.
Altium Designer 6.8 introduces new OpenBus System feature to reduce such design complexity. Processor-peripheral interconnections are represented in a more abstract way by providing a design environment for creating your system that is highly intuitive, streamlined, and less prone to error. OpenBus System focuses primarily on the representation of the main processor system within an FPGA design.

Figure 32. Graphically build your processor-based system using the OpenBus Editor.

Familiar Schematic-like Editing Environment

OpenBus System is created and managed using Altium Designer's OpenBus Editor . The OpenBus Editor has the familiar look and feel of Altium Designer's Schematic Editor, with it's own unique set of resources for creation of an OpenBus System. Filtering and inspection are provided courtesy of OpenBus Filter, OpenBus Inspector and OpenBus List panels, accessed from the OpenBus panel access button, to the bottom-right of the main design window. These resources provide a raised abstraction level for creating your processor-based design in a more visual and intuitive way.
To add a new OpenBus System document type to your design, simply right-click on the name of the FPGA project in the Projects panel and choose Add New to Project » OpenBus System Document from the context-sensitive menu. Any FPGA design project that uses this system must have a top-level schematic as all interface circuitry remains on the top-sheet. The main processor system is defined in a separate, OpenBus System document (*.OpenBus).

Connectivity between the two is made through a sheet symbol placed on the schematic.
The starting point for any OpenBus System document is the placement of the required devices that will consitute your system. In the OpenBus Editor, the corresponding OpenBus components are placed from the OpenBus Palette panel. Placement of components is a simple two-click affair - once on the required entry in the panel, and once in the workspace at the desired location.

Placement of the constituent system building blocks is simple, and wiring up the system is equally easy. In the OpenBus System, the individual bus interface signals are not exposed, only a single port represents an interface. Two components are connected to each other using a single link, referred to as an OpenBus Link. Links are made between ports of devices, with direction always being from a master port (red) to a slave port (green).
The OpenBus Editor provides numerous commands for reshaping links post-placement, allowing you to craft the graphical depiction of your system exactly the way you want it.

System Configuration

OpenBus System is designed to facilitate the creation of a processor-based system as quickly and as intuitively as possible. Configuring your system to ensure correct decoding widths, port data widths and addressing is equally easy. Some schematic components are configurable, for example processors, certain peripherals, memory controllers and interconnects. Corresponding representations of these components in the OpenBus System world are configured in a similar fashion - simply choose the Configure command from the associated right-click menu, or double-click on the component directly.
Configuration of the interconnect and bus mastering devices in an OpenBus System is also streamlined with much of the configuration handled behind the scenes. For example, there is no manual addition and deletion of devices to and from an interconnect. If a link exists between a peripheral and the interconnect, the device will automatically be listed in the dialog. Fortunately, information is acquired from the peripheral itself, so no having to enter addressing modes, data or address bus widths. In fact for most designs, all you'll need to do is specify where in a processor's address space a linked peripheral is to be located - making design not only fast and efficient, but a pleasure!

Figure 35. Example of interconnect configuration - simplicity itself!

Configuring Processor Address Space

An OpenBus System incorporating a 32-bit processor will typically involve the connection of slave memory and peripheral devices - to the processor's external memory and peripheral I/O interfaces respectively. Unlike a schematic-based design, you are not required to manually define the mapping of these devices into the processor's address space as this is handled for you. Mapping information is supplied through the respective configuration dialogs (processor, peripherals, memories and interconnects). OpenBus System simply takes this information and dynamically maps each device memory or peripheral device accordingly.

Interfacing to the Schematic Sheet

Once your OpenBus System is defined and configured, it needs to interface to the top-level schematic in the FPGA design which is handled through a sheet symbol placed on the schematic sheet. Remember that sheet entries required to populate the sheet symbol are found through use of the Schematic Editor's sheet entries and ports synchronization feature launched from Sheet Symbol Actions » Synchronize Sheet Entries and Ports. The last stage required to hook an OpenBus System into the FPGA design is to wire-up the external interface circuitry. This is the circuitry that runs between the external interfaces of the peripherals in the OpenBus System, and the physical pins of the FPGA device in which the design will be programmed. It includes any additional logic devices used in the design.

To get started with OpenBus System, take a closer look at a new tutorial Converting an existing FPGA Design to the OpenBus System

Additionally, a new article explores this feature in more detail Streamlining Processor-based FPGA Design with the OpenBus System

New - C-to-Hardware Compiler

Altium Designer 6.8 introduces a powerful C-to-Hardware Compiler (CHC), which takes standard untimed ISO-C source code and produces a synthesizable hardware file (RTL). Upon synthesis, this RTL description is translated into an electronic circuit that implements the required functions. C-to-Hardware Compiler is used in conjunction with Altium Designer's traditional embedded software compilers, allowing you to create designs where an embedded processor can offload critical functions to hardware.
With Altium Designer's C-to-Hardware Compiler, you don't need to know anything about programming in a HDL language, such as VHDL or Verilog. Simply write both hardware and software functions in the same C source code file. Once your software code is fully debugged, the generated hardware can be produced - no more time-consuming simulations for debugging hand-written RTL descriptions, leading to reduced development costs and quicker time to market.

Ease of Implementation

Using the C-to-Hardware Compiler is a straightforward process. On the embedded software side simply write your C source code, including the functions intended for hardware. On the hardware (FPGA design) side, you add an appropriately-configured Application Specific Processor peripheral (ASP).

Figure 36. Example of an ASP component wired into an OpenBus System described later.
From a schematic document, peripherals are placed as a WB_ASP component from the FPGA Peripherals integrated library. From an OpenBus System document, place an ASP component from the Peripherals section of the OpenBus Palette panel. Once wired into an FPGA design just like any other peripheral, the ASP enables a host processor access and control over hardware-compiled functions within. These functions populate the ASP once the design project has been compiled and synthesized.
For a design that contains common variables accessed by software and hardware functions, these variables are allocated in shared memory (for example in FPGA Block RAM or external SRAM), with both processor and ASP wired to this memory. The ASP has an external memory interface for connection to this memory, wired in the same manner as for any other memory-based peripheral.

Figure 37. The configure dialog is control-central for enabling C-to-Hardware compilation - choosing which functions to be implemented in hardware and which variables should be allocated in hardware.

Use the right hand side of the dialog to determine variables to allocate in hardware and functions to be implemented in hardware. The upper list reflects all global variables present in the linked embedded software project. If you want to have a variable allocated in hardware, simply enable the corresponding check box in the Allocate in Hardware column. Such a variable will be allocated in ASP block RAM by the CHC Compiler. Access to this memory is much faster, in comparison to storage allocation in block RAM outside of the ASP by the Embedded Compiler.
The lower list reflects all functions present in the linked embedded software project. If you want to implement a function in hardware - generated by the CHC Compiler as part of the ASP - simply enable the corresponding check box in the Implement in Hardware column. Should you wish to be able to call that hardware function from within the software running on the host processor, ensure that the corresponding check box in the Export to Software column is also enabled. Allocation of variables and implementation of functions in hardware can also be performed from within the C source code - either from the C To Hardware panel, or by right-clicking on a global variable/function directly in the code editor and using the relevant commands that appear on the context menu. When using the panel, only global variables and functions defined in the active C document will be listed.

To Generate or Not to Generate...

When configuring the ASP component, two of the most important options you will ever need to use are Generate ASP and Use ASP from Software. The Generate ASP option provides the ability to enable or disable generation of hardware-compiled functions. With this option enabled, the C-to-Hardware Compiler will be invoked when you compile and synthesize your design project. All functions that have been enabled for implementation in hardware will be created as electronic circuits in the FPGA fabric.
The Use ASP from Software option enables you to control, on a global level, whether functions compiled into hardware will be called by software-based functions running within the processor. If this option is disabled, the embedded compiler will generate the functions in software and these will be used.
If a design has been processed with the Generate ASP option enabled, then if the state of the Use ASP from Software option is changed, you only need to recompile and download the updated embedded software. Full reprocessing of the entire FPGA project is not required as the logic for the hardware functions already exists. In this way you can quickly switch between software-only and software-hardware implementations of the design, to observe the benefits obtained by using hardware acceleration.

For information on the ASP component, refer to the document WB_ASP Configurable Wishbone Application Specific Processor

Improved - Version Control

Version control has been improved to provide better feedback and more intuitive usage - files status can be refreshed from both the Storage Manager panel (right-click and select Refresh or hit F5). Additionally, file status is more informative, making it easier to see which files need to be committed or updated.

Figure 38. You can also manage conflicts and missing files from here. Any revisions that you have currently checked out display a blue arrow ( ) in the VCS Revisions section.

Two new version control statuses are reported:
Missing means that the file is present in the repository but not on your local hard drive. This can happen if a file is deleted or renamed, or if a new file is added to the project. Missing files can be retrieved from the repository by selecting Restore on the right-click menu.
Conflict means that someone has committed changes to the file before you have had a chance to commit your own. Files that are in conflict cannot be committed until the conflict is resolved.

New - Actel ^® Fusion support

Altium Designer now has full support for the Actel Fusion family of FPGA devices, including PCB/FPGA integration, Board Level and FPGA libraries, Synthesis, Programming and LiveDesign. Embedded Flash Blocks are used to initialize the internal memory of 32-bit processors making the Fusion devices a perfect platform for Embedded applications. All analog functionality is accessible and configurable through a new Analog Block System configurable component (AB_SYSTEM).

Figure 39. Altium Designer includes a new configurable component to take advantage of the Analog to Digital converter integrated inside the FPGA. This component lets you configure the resolution, sampling, analog input and gate driver.

Improved - NXP LPC2000 ^® Series Support

Support for the NXP LPC2000 ^® Series of discrete ARM7-based processor devices has been improved. You can now download code to the on-board Flash memory of these devices via Altium Designer. Support for hardware breakpoints facilitates subsequent debugging of this code.
In addition, Altium Designer is aware of the internal memory structures of all devices in this range of processors. Embedded projects using these devices will automatically be configured with the correct memory layout information.

New - FPGA Peripheral Cores

Expanding your options for peripherals, Altium Designer 6.8 adds support for a number of new peripheral cores. For schematic-based design of your main processor system, all peripherals can be found in, and placed from, the FPGA Peripherals integrated library (\Program Files\Altium Designer\Library\Fpga\FPGA Peripherals.IntLib. For a design incorporating an OpenBus System, all components can be found in, and placed from, the OpenBus Palette panel.

WB_ASP

The WB_ASP peripheral is an Application Specific Processor used as a container for C source functions that are implemented in hardware through use of the C-to-Hardware Compiler described earlier in this document.

WB_IDE

The WB_IDE is a Wishbone-compliant peripheral that provides the control interface between an IDE-compatible storage device, such as a hard disk or Compact Flash memory card, and a processor in the FPGA design.

WB_IRCODER

The WB_IRCODER peripheral provides the interface between an infrared transmitter and a processor in an FPGA design. The peripheral has been built primarily to interface to the TFDU6102 Fast Infrared Transceiver (from Vishay Semiconductor) found on Altium's USB-IrDA-Ethernet Peripheral Board PB03. However, it could be used to interface to any IR transmitter where the required input signal is already modulated and simply controls the pulsing of the transmitter's IRLED.
The peripheral encodes remote control codes using the NEC IR transmission protocol and handles the modulation of the signal at the carrier frequency associated with this protocol - 38kHz.

WB_IRDEC

The WB_IRDEC peripheral provides the interface between an infrared receiver and a processor in an FPGA design. The peripheral has been built primarily to interface to the TFDU6102 Fast Infrared Transceiver (from Vishay Semiconductor) found on Altium's USB-IrDA-Ethernet Peripheral Board PB03. However, it could be used to interface to any photodiode circuit or IR receiver where the output signal is passed on, still in modulated form.
The peripheral handles demodulation of the incoming signal and can be configured to operate in one of two modes - either as a dedicated decoder for data transmitted using the NEC IR transmission protocol, or as a raw interface, allowing the reception of data encoded in any other format. In the latter mode the encoded data is received by the processor, to be decoded in software.

WB_JPGDEC

The WB_JPGDEC peripheral facilitates the decoding of baseline JPEG-compressed images (grayscale and color) into RGB565 pixel format output that can be written directly to screen display memory, or to a continuous external memory storage area.
The full JPEG image can be decoded, or only a specified area. The peripheral also supports block-based reading and writing.

WB_OWM

The WB_OWM is a 1-Wire® Master Controller that facilitates communications between an FPGA-based processor and external 1-Wire-compatible peripheral devices, over the 1-Wire serial bus.
The Controller handles all timing and control signals required to satisfy the 1-Wire protocol. Once mapped into the processor's peripheral I/O space it is seen and used by the processor as a dedicated 1-Wire port. The processor simply has to set up interrupts, issue control commands, and send and receive data.

WB_SHARED_MEM_CTRL

The WB_SHARED_MEM_CTRL is a Wishbone-compliant configurable memory controller that, depending on its configuration, provides an interface between a 32-bit processor and memories on a shared bus. The Controller provides access to, and use of, the following three different types of memory, each of which is multiplexed for access over shared data and address busses:

• Asynchronous Static RAM
• Single data rate Synchronous DRAM
• Parallel Flash memory
  The Controller handles all multiplexing for you, negating the need for custom demultiplexing logic.
  Note: The WB_SHARED_MEM_CTRL is primarily designed to be used with the common-bus memories located on Altium's 3-connector daughter boards, such as the Xilinx Spartan-3 Daughter Board DB30. Provided the same pinout is used, the Controller could be used to interface to other memories of the types supported, and which are accessed using shared bus architecture.

New - Lattice SC ^® support

Support for the Lattice SC ^® range of devices has been added:

• SC15 (LFSC3GA15E)
• SC25 (LFSC3GA25E)
• SC80 (LFSC3GA80E)
  You can now use the Altium Designer environment to work with these powerful and flexible Lattice devices.
  More information on the supported devices can be found through the Browse Physical Devices dialog. Access this dialog from the Devices view (View » Devices View) by choosing the Browse Physical Devices entry in the main Tools menu.

New - Actel CoreMP7 Support

Altium Designer now includes Wishbone wrapper support for Actel's 'soft' CoreMP7 RISC processor core, for use in FPGA designs targeting supported Actel Fusion or ProASIC®3 families of physical FPGA devices.
Similar to (and fully compatible with) the ARM7TDMI-S™ core processor, the CoreMP7 is an implementation of the ARM® architecture v4T.
Only designs targeting the supported Fusion or ProASIC3 FPGA devices, listed to the right, may make use of the processor.

Improved - Flash Memory Support

The existing configurable Memory Controller component (WB_MEM_CTRL) has been improved to now support connection to Parallel Flash memory. This is similar to the Parallel Flash memory support offered by the new Shared Memory Controller device (refer back to New - FPGA Peripheral Cores). Whereas the Shared Memory Controller supports interface to the single 16-bit (32MB) Flash memory found on the upcoming 3-connector daughter boards associated with the Desktop NanoBoard NB2DSK01, the WB_MEM_CTRL device offers interface support to a wider range of Flash memory sizes and layouts.

New - LiveDesign Instrument

Greatly improving FPGA debugging capabilities, three new LiveDesign instruments give you yet more options for testing your designs. These appear in the Devices view in the software chain after compiling and synthesizing your FPGA project.

Terminal Console

Console IO is a common way of debugging processor systems, and with this release you will be able to type text directly in the Terminal console to send text to your device. The Terminal is Wishbone-compatible and is connected to the design the same way as any other WB-compatible peripheral. Reading/writing to this instrument from embedded code is very similar to reading/writing to the WB_UART8 peripheral.

Configurable Digital I/O

If you have already used one of the IOB instruments, you'll find this new instrument works in a similar fashion. With Configurable Digital I/O highly customizable interface, you can change the display format of input and output using graphical widgets that can be configured for your design as well as the ability to configure input and output busses, and initial output values.

CrossPoint Switch

Debugging FPGAs can be made easier by having multiplexers with their switching inputs driven by a digital IO instrument. The Crosspoint Switch instrument is designed for just this purpose! This nifty instrument allows you to define which inputs go to which outputs. You can even opt to disconnect inputs and outputs.