Winter 09 Service Pack 1 Build 8.1.0.16385 (from Build 8.0.0.15895)

PCB

• The Layer Name is no longer truncated in Pad properties dialog.
• Now the board outline edge and sheet outline edge will be drawn using the current configuration's "Board Line Color" and the "Sheet Line Color" colors respectively.
• Fixed AV when interactive routing tool would attempt to hug around regions with specific geometry.
• Fixed the behaviour when remote desktop is used while AD is running with DirectX on. It will now use GDI in the remote view, and restore DirectX when the local view is restored.
• Change the Action column name to "Body State" and the labels to "In Component" instead of "Remove From Component" and "Not In Component" instead of "Add to Component".
• Now the "Move vertices" command will work only for copper pour polygon objects. If a cut-out region and a polygon overlap there will no longer be any ambiguity when selecting this command. A new command "Move Region Vertices" has been added to "Edit / Move" menu that will allow the moving of region vertices.
• Designs that contain many objects on mechanical layers could produce slow DRC. Such conditions no longer impact the performance of DRC.
• Internal plane cuts and relief patterns around offset pads in DirectX will now correctly draw around the hole instead of the pad.
• Now the mirrored embedded board array will correctly generate rotated pads when exporting Gerber, ODB++ or printing.
• Component clearance between extruded bodies had a bug preventing it from working reliably until switching to 3D. This has been fixed.
• A bug in track dragging has been resolved. The issue occurred when a track that was part of a T junction was dragged causing part of the junction to be ripped up.
• The Interactive Router now correctly cycles through the connection lines in response to the 'next routing target' command.
• An issue where the differential pair polarity was sometimes reversed when pin swapping differential pairs on a FPGA component has been rectified.
• Now any polygon pour placed on a mechanical layer will keep its state even after saving, closing and reopening the PCB document.
• Drag selection boxes in DirectX will no longer be affected by masking or dimming.
• A move or rotate of a component that contains a board cutout did not update the board shape nor split planes properly. A board cutout modification now affects the board shape and internal planes as intended, whether the board cutout is placed on the board or found in a placed component.
• When dragging track ends if the command was canceling a bug existed that would create duplicate no net tracks. The situation has been corrected.
• Fixed rounded rects with small corner radii disappearing in DirectX when zoomed out.
• Now the EscapeRoute will route only on layers that are enabled in the defined Routing Layers Rules.
• When the size of a via shape on a specific layer is set to a value that is less than the hole diameter, utilities that rely on clearance around the via hole where not operating properly; particularly interactive routing, DRC, and copper pour polygons. Processing is now improved throughout the system for via shapes that are specified as smaller than the via hole.
• When the PCB Library panel is used to copy and paste multiple components from one PCB library to another, some components could be left behind, while multiple duplicates of other components were created. PCB library component copy/paste has been corrected.
• 3D snapshots and 3D prints will now obey the orthographic projection setting.
• Fixed crash in PCTF.dll in DirectX mode when board contained invalid polygons without proper shape.
• When deleting multiple components from a PCB library by selecting them on the PCB Library panel, not all components are deleted. PCB library delete of multiple components has been corrected.
• Now when editing the "Description" field the focus will remain in this field until the user leaves it (either by clicking on a different control or by TAB out of the control).
• When an internal plane layer was added to a PCB design's layer stack, board edge pullback objects were not auto-created. Board edge pullbacks are now properly created (and adjusted when an internal plane's Pullback property is modified).
• Fixed crash during batch DRC check of un-routed net rule when net contained more than one interconnected un-plated pad.
• Un-routed net violation caused by un-plated pad has a proper description in PCB Panel now.
• A scene containing many small polygons in DirectX will now build quicker.
• Fixed board outline and sheet not updating after creating a board with the PCB wizard.
• Fixed an incorrect opacity calculation in ordered blending. Transparent objects which previously appeared too transparent will now draw correctly.
• Improved handling of comma as a decimal separator in PCB. Using "Find Similar" will now correctly distinguish between tracks that are 0.2mm wide and 2mm wide.
• In DirectX, zero length tracks are now visible. This also fixes dots on "i"s in stroked text.
• When placing a Polygon Room in DirectX display mode, a phantom graphical line was rubber-banded from upper left workspace location to current cursor location. This distracting graphical line has been removed.
• Now dragging the corner between 2 tracks on a mechanical layer will work as expected.
• Modifying a Room object's layer property could produce an access violation, and render the Room as an undisplayable object. This has been corrected.
• Now the Net Manhattan Length will be displayed in the PCB Panel Nets list view next to the Routed Net Length.
• Due to a bug in previous versions of Altium Designer it was possible that a PcbDoc contained rooms on invalid layers which resulted in them becoming invisible. Any such rooms are now moved to the top layer at the point that the PcbDoc is loaded.
• When placing a Polygon Room, the system placed the Room object on the currently active layer. Polygonal Rooms are now restricted to Top/Bottom layers, consistent with their layer designation, and consistent with behavior of Rectangular Rooms.
• Now swapping columns will display the values using the current columns order instead of the default order.
• When dynamically updating the 3D model used to define the PCB board outline the system will now unhide the appropriate model sub parts.
• Now the inverted text will display correctly in DirectX graphical mode.
• Stopped the length-tuning graphical gauge from dimming in single layer modes.
• Now when changing the graphical view from 2D to 3D the first time the document will be zoomed to fit.
• Fixed 'disable roll' space navigator option.
• The lighting in 3D has been made to look more like summer 08 again.
• The floor shadow option is now obeyed.
• Now the "Reposition Selected Components" command will move the selected components to cursor if the "Move component to cursor " option is selected in "Move Component" command "Choose Component" dialog.
• Fixed a crash in the interactive route tool when a via is inside and connected to a pad.
• Fixed the interactive router for cases where the mouse was moved outside the workspace region, which would result in excessive memory being consumed.
• Selection boxes in DirectX will no longer go dim or invisible in single layer modes.
• The multi threading pour options have now been removed from the Preferences/General page.
• With PCB List panel open, deletion of a dimension or component from a PCB design's graphic workspace failed to remove the deleted object from the PCB List. The PCB List panel is now properly updated when composite objects are deleted from the PCB design.
• Fixed cursor disappearing in PCB library after performing an 'align face with board'.
• Fixed a crash in the interactive route tools for some scenarios when pushing a via.
• Align face with board would inconsistently flip the object, or sometimes fail to place it at the level of the board. This has been fixed.
• Fixed the appearance of transparent selection boxes in 3D when using ordered blending.
• 3D Body Textures now correctly load from PcbLib documents.
• Graphic workspace object selections that occur as a result of PCB panel selections could fail to immediately update the PCB List panel and PCB Inspector panel. The PCB List and Inspector panels now remain in sync with graphic workspace selections, whether objects are selected on the graphic workspace or on the PCB panel.
• Fixed the interactive route tool to use the proper clearance rule when walking around signal and keepout layer arcs.
• Now the full stack pads will always be drawn correctly in DirectX graphical view and Single layer Mode.
• Switching to and from the from-to editor in DirectX now refreshes the displayed connection lines.
• The board insight view in DirectX now respects the active layer, and pad and via text draws correctly.
• When signal layers are disabled in DirectX, solder mask layers will now display if they are enabled.
• The board insight view will now use GDI if the Use DirectX system option is unchecked.
• Now Highlighting during interactive editing in DirectX graphical mode works similar with the GDI graphical mode.
• Fixed interactive route intermittent hang/crash when placing a via with the '2' key.
• Now the existing component bodies will be deleted if the "Delete Existing Bodies in Components" option is ON when doing a batch update in the PCB Library editor.
• Now the "3D Body Color Opacity" field can be updated using the Component Body Manager dialog in both "Interactive" and "Batch" modes.
• Added Locked column in Components treeview in PCB Panel so the user can see if a component is locked or not.
• Now any empty polygons will be selectable.
• Polygon repour will no longer crash for certain neck removal settings.
• Interactive part swapping has being fixed so that it works correctly when a Schematic component has subparts with common pins.
• The pin swap dialog has been improved when configuring a component with multiple subparts. Previously the swap values entered were lost as the tabs of the dialog were selected.
• Rounded rectangular pads having corner radii that resolve to a size that is less than 14 mils could produce errant DRC clearance violations. Distance calculation involving rounded rectangular pads has been corrected, so these faulty violations no longer occur.
• All 3D body snap tools now allow you to select the bodies through other objects.
• Repeatedly hitting '0' will no longer cause the board to slide towards the bottom-right.
• The 3D visualisation view will no longer needlessly redraw multiple times whenever the main PCB window gains focus, or after every middle-click zoom.
• Now the Snap Circle will no longer disappear in Single Layer Mode in DirectX graphical view.
• Ordered blending will now work properly in 3D prints and snapshots.
• The speed of "Move Polygon Vertices" command has been improved.
• Ctrl-shift-clicking on empty space no longer causes the highlight to be lost on all highlighted objects.
• When crossprobing with DirectX on, the scene will no longer do an unnecessary full rebuild.
• In DirectX, the display could sometimes lag many frames behind the cursor when panning or zooming. This has been fixed.
• In the component update from library options dialog, the OK and Cancel buttons have been swapped so OK is on the left, as is usual.
• An issue in the "Save a copy" command has been resolved whereby the PcbDoc was incorrectly identified as modified when saving a copy to a STEP file.
• The cursor will no longer be visible in 3D prints and snapshots.
• Pressing TAB in the pair section of the pin swap dialog no longer results in a crash.
• Fixed crash in interactive router that would sometimes occur when using the "Follow Mouse Trail" option.
• A bug causing 3D bodies to be initially invisible after switching to 3D has been fixed.
• After routing with online DRC off, the cursor could get stuck as the hourglass symbol after processing was finished. This has been fixed.
• In DirectX, zooming with ctrl+mousewheel will now skip frames as necessary to keep up.
• The tolerance when creating a board outline from a 3D has been changed to 0.5mil. A larger value was previously used and was creating course outlines when the outline contained large arcs.
• Mirroring cylinder 3D bodies or components containing cylinders will now work properly.
• The shadow in 3D will no longer flicker when the camera is zoomed in and looking straight down.
• Grabbing polygon and room handles has been fixed so that each pixel of the handle can be grabbed by the cursor.
• The polygon mode of the PCB panel now displays shelved polygons. Additionally double clicking a polygon or polygon class now displays the appropriate property dialog.

Schematic

• Centered and right-justified Designators no longer appear to move when the project is compiled with superscripts enabled.
• Supplier Unit Price was not being calculated for grouped components in the BOM and appeared as 0. This issue is updated in this release to show the field blank, as an error indicator.
• If the operating system uses a comma (,) as a decimal symbol instead of a dot (.) - numerical values such as Supplier Unit Price were displayed as 0 in the BOM. This release fixes this problem by displaying the numerical values correctly, regardless of the decimal symbol used.
• An "Override library primitive" option for Comment and Designator has been added to Preferences>>Schematic>>Default Primitives. This allows the font and colour of Designators and Comments to be overriden systemwide.
• Update from Libraries with Full Replacement correctly moves parameters to their default positions again.
• Newly added Schematic Library components now inherit graphical attributes from the default Comment and Designator primitives (regardless of the Override library primitive option).
• An intermittent crash closing SchLib documents has been fixed.
• When placing a component from a Database library and another library was open in the project, the parameters of the component were stripped out. This has been corrected.

FPGA

• Programming Actel ProASIC+ devices after the flow has been run no longer fails with an error "EXIT CODE = -90... UNKNOWN EXIT CODE ".
• Schematic library components can now be generated from the ports of VHDL and Verilog files in Core projects.
• A problem with reading bidirectional ports while targeting Lattice devices have been resolved and the Altium synthesizer is now setting IO buffers properly.
• Installing Actel Designer from a Libero installer is no longer causing an error "This Application has failed to start because abiactel.dll was not fount." in the Devices View when trying to detect the devices.
• CHC Commands "Push and Export From Hardware" and "Push To Hardware" no long appear in the right click menu for text documents such as Delphi script and constraint files. These commands also do not appear for C source and header files in FPGA or Core projects.
• An example project with complete constraints file targetting the Altera ArriaGX PCIExpress developement board is now available.
• Programming Altera FPGA devices configured in AS mode is not longer causing the programming stage of the FPGA flow to fail.
• An example project with complete constraints file targetting the Altera Cyclone 3 Starter Kit is now available.
• Components parameters are now properly applied as attributes in the automatically generated VHDL netlists when components of the same type have different parameters values.
• The Actel Fusion FPGA library has been reviewed and is no longer including irrelevant primitives like the MULT8B component.
• The drawing of OpenBus components was improved to support higher resolution images.
• It is now possible to make Custom Instruments panels resizable and to set their minimum and maximum dimensions.
• PowerPC 405A processors are no longer display as TSK80 processors in the Devices View.
• The show/hide action for Custom Instrument form is now behaving as expected.
• An access violation no longer occurs when clicking the Up to Date Download button in the Devices View while the embedded application is using non-volatile memories instead of ROM.
• The Close Project Tree command no longer fails to close all documents if the FPGA project includes more than one Embedded project.
• It is no longer possible to add extra ports to Bus Explorer, Bus Importer, Bus Connector and Port Terminator components in OpenBus documents.
• Changing Custom Instrument's viewer type from rack to panel and back is now automatically propagated to the opened viewer.
• The Custom Wishbone Interface (WB_INTERFACE) component has a new option to forward select lines to address range items.
• FPGA and Core projects now have a command in the Projects panel right click menu to regenerate harness definitions.
• The instrument panel for Generic ARM7 processor is no longer empty.
• The Open in Code Editor functionality in the Code page of the Custom Instrument component Configuration dialog has been resolved and code is now properly saved when edited through the text editor.
• The progress bar while resetting or programming Actel ProASIC3/3E and Fusion devices is no longer missing in the status bar.
• The CHC Accumulator tutorial design has been reviewed and is no longer showing an empty instrument panel.
• Compiling an FPGA/Core project will now detect and report harness connectors in a Schematic document which have conflicting definitions, and OpenBus documents containing conflicting harness definitions.
• Clicking and dragging controls in the Layout page of the Custom Instrument Configure dialog has been reviewed and is behaving as expected even after changing focus between the pans in this dialog.
• Custom Instruments panels are no longer excessively flickering when they are resized.
• Custom Instruments leds controls have been extended and now include rectangular styles.
• A new 32-bit SPI Bootloader component (WB_BOOTLOADER_V2) is now available in the OpenBus and Schematic editors.
• A new Global Clock option has been added to the buffer configurable component to instantiate vendor specific clock buffer when available.
• Clock cycles for Reading and Writing timing options are now accessible in the Configure dialog of the WB_MEM_CTRL core while the memory type is set to Asynchronous SRAM.
• An error with the default internal state of the reset signal of the WB_SPI core has been resolved and is no longer causing the core to stop responding after a physical reset.
• The Web Server show case example has been review and excessive delays when browsing the web pages are no longer experimented.
• A typo in the name of the SLR0_WB component from the FPGA Peripherals (Wishbone) library has been resolved. This is no longer causing the Build stage of the FPGA flow to fail.
• An error "NgdBuild:653 - An invalid target package f48 was given in the -p option value" no longer occurs in the Translate Design stage of the FPGA flow when targeting some Xilinx CoolRunner 2 devices.
• Bus names in HDL generated netlist of the configurable generic components are now all ending with a _B suffix to avoid netlist problems when multiple components with signals width greater than 11 bits are used.
• The Show Pin Names option has been added to the Configure dialog of the Configurable Bus Joiner/Splitter component.
• A new configurable comparator component has been added to the FPGA Configurable Generic library.
• A new configurable multiplexer/demultiplexer component has been added to the FPGA Configurable Generic library.
• The BUFIO and BUFR components in the Xilinx Virtex-5 FPGA library have been updated and are no longer identical to the BUFGMUX_1 component.
• Bank ID are no longer missing in the Altera Stratix III nexus driver.
• The Spinning 3D Cube reference design has been reviewed and the display is no longer flickering when the design runs in CHC mode.
• It is now possible to use Xilnx ISE 32-bit version on a 64-bit Operating System.
• A new configurable adder and subtractor component has been added to the FPGA Configurable Generic library.
• Bus Joiner/Splitter can now be configured to automatically connect to GND or VCC.
• Support for SDRAM in Shared Memory controller has been improved. SDRAM controller is correctly configured to use byte enable lines 1..0 in 1x16 mode and ignore lines 3..2
• The SSPIA symbol in the Lattice XP2 FPGA library has been updated and is no longer causing the Map Design stage of the FPGA flow to fail with the error "SSPIA TAG Memory component is obsolete and not supported".
• User can define the gap between pins in Bus Joiner/Splitter.
• A new configurable counter component has been added to the FPGA Configurable Generic library.
• The WB_JPEG decoder core is now functioning as expected when targeting a Xilinx Spartan3A-DSP device.
• NanoBoard reference designs have been updated and now include configurations to target the DB32 and DB43 daughter boards fitted with Lattice ECP and Lattice ECP2 devices respectively.
• Pre-scaler interrupt of the PWMX core is now working properly.
• Linking an FPGA to a PCB project in the Structure Editor of the Projects Panel no longer cause an error "No compatible configurations in project" to appear.
• The Configuration Flash > Choose File and Download command can now be used on Lattice XP and XP2 devices even if Lattice ispLever is not currently installed.

System-level

• Bookmarks now zoom to the correct location when you create a mirrored PCB printout using Smart PDF or Publish to PDF.
• When changing the PCB printout name using inline editing, the modified name was not saved. This bug is fixed.
• Compiled Sheets are now printed numerically in your Smart PDF and Publish to PDF output.
• Now the pad/via solder and paste mask expansions will be drawn in the color chosen by the user.
• The schematic options in SmartPDF (Include No-ERC Markers, Parameter Sets, and Probes; and Use Physical Structure Designators, Net Labels, Ports and Sheet Entries, Sheet Number Parameter, and Document Number Parameter) work again.
• Smart PDF schematic now correctly displays the variant value of the Non-Fitted component.
• Publishing a Schematic or PCB to PDF with Page Size and Orientation set to "Source Document" in your PDF Setup no longer resets the Scale in your Page Setup to 1.0. Also, publishing a specific area of a PCB to PDF with Page Size and Orientation set to "Source Document" gives you a page the size of the specific area, not a page the size of the board containing mostly empty space.
• Publish To PDF bookmarks are now limited to include only the relevant components for the selected printouts and layers in Assembly Drawings.
• Smart PDF of a specific area of a PCB automatically zooms to fill the paper size as it did in Altium Designer 6.9.
• Incorrect values for Pad-Y in the Bill of Materials have been fixed.
• The SVN+SSH option has been added to SVNDBLIB.
• The accuracy of Smart PDF and Publish To PDF with Page Size and Orientation set to Source Document has been improved. Distortion that was previously noticeable on small features such as drill holes, wire junctions, and small text should be greatly reduced.
• Only the relevant bookmarks are included in your Publish to PDF and Smart PDF output when you select 'Specific Area' to print in your PCB Printout Properties.
• Database parameters from DBLIBs that have been opened and closed again no longer disappear from the Bill of Materials.
• Smart PDF now outputs a bookmark node for each part in a multi-part schematic component.
• Schematic Sheets with duplicate Sheet Numbers are no longer excluded from Smart PDF and Publish to PDF output.
• Bookmarks in your PDF output now zoom and highlight correctly in PCB Prints and Assembly Drawings.
• Some older version CADSTAR archive (.CPA) have orientation value format different than the newer version CASTAR archive. This can cause an component orientation error in the CADSTAR import . For example, the 270 degree orientation is translated as 2.7 degree. This error is fixed for Winter 09 service pack 1.
• The CADSTAR importer now supports .CSA (archived schematic document) files.
• An option to import Orcad Placement Outline Obstacles as Altium Designer component body outlines has been added.
• The CADSTAR PCB importer now imports pads with unequal left and right lengths correctly.
• The CADSTAR importer now imports component copper pieces.
• The height information for a component imported from a Cadstar Library is now imported as a footprint property rather than a Schematic Symbol Parameter
• A bug involving bottom side pads being reset to default 60 mil size has been fixed.

Embedded

• Pressing F1 in code editor when cursor is over a #include of a Software Platform header file will open corresponding help window.
• Undo/Redo feature is now available after Import from FPGA in Software Platform Builder.
• The remove() function has been added to the file system code of the Software Platform, to prevent linker errors in some situations.
• Software Platform Builder sometimes allowed or showed invalid candidates for linking to existing device stacks. This has been fixed.
• Debugger register IDs of banked ARM registers are now consistently used.
• Stepping out of a function is disabled while debugging if the current function is on the bottom of the call stack.
• A menu item and toolbar button has been added to reset the program and run to main before halting.
• User breakpoints set before or at main will now be handled properly by the debugger.
• The debugger should no longer cause termination problems when closing Altium Designer.
• Don't create debugger memory panels from persistent session data if the processor for the project has changed.
• When importing from an FPGA project into a Software Platform document, the FPGA project will first be recompiled.
• Software Platform Builder generated files (devices.h, generic_devices.h, instruments.h) are now added to the generated documents list of the embedded project.
• Generation of the hardware.h file for embedded projects is disabled by default. The file is not needed for Software Platform Builder projects.
• The Debug Toolbar is now in view when the user is working with a Software Platform document.
• Breakpoints can now be set in ARM code when in disassembly view.
• A clear error message is produced by the Software Platform Builder when the memory in which the VGA buffer must be located was removed from the design.
• By default the C compiler will not use the JMPI instruction as this instruction is not supported by the version of the Nios II core in Altium Designer.

Library Management

• The positioning of vertical text in Library Reports has been fixed.
• The library browser panel now refreshes correctly after a filter has been applied to a DBLIB and then removed.
• Update of PCB now populates the Library Link fields correctly.
• Typing the first few letters of a component name in the Libraries panel now highlights the component in orange for DBLIB too.
• When you search in a database library, the symbol displayed for the first search result is no longer the symbol of the first database record.
• Harmless exception messages from IntegratedLibrary.DLL that sometimes appeared when editing PCBLIBs are now gone.
• The Delete button under Supplier links in SCH Library now correctly removes parameters that have been set to Visible.
• Disabling a supplier in Preferences now disables the download of live information for existing supplier links, as well as for new searches.
• A bug involving multi-key lookup DBLIBs in the Libraries panel has been fixed.
• The time taken to open the Libraries Search dialog from the Libraries panel has been greatly reduced.
• You no longer have to click off a SchLib component and back on again to see added Supplier Link parameters.
• A crash on the next search after doing a Library Search in "Libraries on path" has been fixed.
• The Supplier Links dialog now show supplier links correctly for parts with blank designators.
• The operators in the Libraries Search dialog no longer reset to "equals" for no reason.
• A "List index out of bounds" error in simple library search involving Database Components has been fixed.
• If not enough memory is available to install or extract a very large Integrated Library file, Altium Designer will now fall back to a less memory intensive method.
• The Libraries panel now remembers the last model type you selected between sessions, and never implicitly selects a noncurrent model unless you explicitly select one.
• Clicking the Add supplier link button on the SCH Library panel now makes the Supplier Part Number parameter visible, not the Supplier parameter.