Extended C-to-Hardware Features

Related articles: Introduction to C-to-Hardware Compilation Technology in Altium Designer, Tutorial - Designing Custom FPGA Logic using C

FPGA designs can be created using a mixture of two techniques – using pre-existing components such as processors and other IP cores, and creating custom logic from scratch. Creating custom logic has the advantage that there is no limit to what can be done. The customer is pretty much only bounded by their imagination – and their tools.

Traditionally, custom logic is developed using hardware description languages (HDLs), such as VHDL or Verilog. This is a difficult and time consuming approach, especially for for the majority of board-level designers who do not already have skills or experience with these languages.

Altium Designer allows engineers to develop standalone custom logic using the C language. This is achieved through use of schematic-based C Code Symbol and C Code Entry design objects, and harnessing the power of Altium Designer's C-to-Hardware Compiler. The C language is much more abstract than any HDL and is also well known by most engineers.

Building on this capability, extended features are available that include:

• The ability for C code in FPGA code blocks to access generic IO ports.
• The ability for C code in FPGA code blocks to access external Wishbone devices and memories.
• The ability for C code in FPGA code blocks to call functions implemented outside the code block.
• Providing control over the C-to-Hardware Compiler's scheduling, by using the wait intrinsic function. The wait function forces the compiler to schedule the statements following the function after the statements preceding the function. Also, an integer parameter can be provided to also schedule a minimum number of cycles to be waited between the two blocks of code.

This extended functionality is provided across the following tabs in the C Code Symbol dialog:

• Ports tab

• WishboneDevices tab

• Imports tab

Extended C-to-Hardware features available across dedicated tabs of the C Code Symbol dialog.

Use these features to enhance the abilities of your standalone, C-coded custom FPGA logic within your designs.