Synchronize PCB and FPGA Project

Parent page: WorkspaceManager Dialogs

Summary

This dialog allows designer to synchronize between FPGA and PCB project. Synchronization of the two linked projects is carried out and maintained by establishing a link between the top-level ports in the FPGA project – specified in the relevant constraint file – and the corresponding pins on the FPGA component schematic. Linking is achieved using the signal name. The name given to the port in the FPGA project must be the same as the net label assigned to the corresponding pin of the schematic component in the PCB project.

Access

When you click on the Schematic-FPGA Project link in the FPGA Workspace Map dialog, the Synchronize dialog will appear

Options/Controls

Matched Signals

• A net label has been assigned to a pin with the same name as that used for the corresponding port in the FPGA project. The pin number is different to that (if specified) in the associated constraint file and/or the electrical type for the pin is different to that of the port. As the port and pin have the same signal name, they will appear in the Matched Signals list. The entry will be highlighted in red as the pin number and/or electrical type is different.
• A net label has been assigned to a pin with the same name as that used for the corresponding port in the FPGA project. The pin number is identical to that in the associated constraint file and the electrical type for the pin is identical to that of the port. As the port and pin have the same signal name, they will appear in the Matched Signals list. The entry will be highlighted in green as the pin number and electrical type are also the same.
• Only Show Errors - Check this option to show red items.
• Update To PCB - Click this button to update the change from FPGA to PCB
• Update To FPGA - Click this button to update the change from PCB to FPGA.

Unmatched Signals

• Unmatched FPGA Signals - All ports that have not been matched to pins with the same name, will appear in the Unmatched FPGA Signals list.
• Unmatched PCB Signals - A net label has been assigned to a pin with a different name to any of the ports in the FPGA project. An entry for the signal name will appear in the Unmatched PCB Signals list
• To Do Items - The Synchronize dialog enables you to create To Do Items so that you can easily remember what needs to be done by checking the To-Do panel.