Release notes for Altium Designer 10 update (10.890.23450)
Update 16: Updated plug-ins from release 10.818.23272 to 10.890.23450
Date: 6 February 2012
Key highlights
Improvement to impedance and width calculations
This release delivers enhanced control for High Speed signal routing in Altium Designer through improvements in the application of trace routing rule calculations. These can be found in the Impedance Formula Editor in the Layer Stack Manager, which now offers more accurate default formulas for impedance and width calculations. View BugCrunch report #201
Specifically, to provide better control for material layers, new variable keywords have been added to the equation Helper including:
ErAbove; ErBelow – define material above or below the trace.
DielectricHeightAbove; DielectricHeightBelow – define dielectric thickness above or below the trace.
Export Free Pad Holes
Altium Designer's support for STEP files allows detailed and accurate modeling data to be interchanged with mechanical CAD and 3D modeling programs. When defining an OutJob for exporting STEP files, a new option has been added to "Export Free Pad Holes" in addition to the existing options to export electrical and mechanical component holes. Designers using Free Pad Holes for board mounting or other purposes can now easily pass this information into the MCAD domain via an exported STEP file.
System Components: Altium Designer Base
5171 | Fixed an issue where locked physical designators were not applied correctly. |
5831 | Fixed crash on document close. |
5856 | Fixed an issue where preferences for New Document Defaults were not always loaded correctly. View BugCrunch report #1191 |
5905 | Fixed a regression issue where multi-channel annotations were not displayed correctly in schematics. |
System Components: Altium Designer Installation System
5848 | Fixed an issue that was causing intermittent application freezing / lockups. |
System Components: PCB System
4604 | Fixed an issue where scripts using the Round function stopped working. |
4638 | More accurate default formulas provided for characteristic impedance and width calculations. Added additional keywords ErAbove, ErBelow, DielectricHeightAbove, DielectricHeightBelow. View BugCrunch report #201 |
5025 | An issue causing Ansoft SIWave to report DC Shorted net errors in exported file on some plane layer connections has been fixed. |
5552 | Fixed an issue where scripts using the Round function stopped working. |
5824 | Fixed loop remove crash with hatched polygon pours. |
5863 | An issue whereby the solder mask expansion and paste mask expansion properties for regions were incorrectly loaded from PcbDoc files has been resolved. |
5878 | Fixed crash on AD shutdown after editing Dimension defaults in PCB. |
System Components: Schematic System
5762 | The size of the negation bar drawn over a space character has been fixed. |
5829 | Fixed an issue where variants were not correctly applied when components had parts on multiple sheets. View BugCrunch report #267 |
5905 | Fixed a regression issue where multi-channel annotations were not displayed correctly in schematics. |
FPGA Design Tools: Aldec Simulator
5847 | Aldec OEM Simulator license file has been updated. |
Importers and Exporters: Exporter - Ansoft
5025 | An issue causing Ansoft SIWave to report DC Shorted net errors in exported file on some plane layer connections has been fixed. |
5026 | No Net primitives are now correctly handled upon import to Ansoft - SIWave, and no longer cause disjointed net errors. |
Output Generators: Output - Gerber
5826 | An Access Violation that used to happen when generating Gerber Output if "Use Software Arcs" option was ON has now been fixed. |
Output Generators: Output - STEP
4767 | An "Export Free Pad Holes" option has been added to the Export STEP outjob. |
Output Generators: Printer - Schematic
5905 | Fixed a regression issue where multi-channel annotations were not displayed correctly in schematics. |