1-Wire Overview

The 1-Wire bus protocol defines a simple serial communications scheme between a single master and one or more slave devices – all of which interface to the bus using a single data line (Figure 1).

Figure 1. Simplified diagram of the 1-Wire concept.

The single wire bus is used for both data transfer and provision of power to the attached slave devices. The latter is made possible by a parasitic capacitor on-board each slave device, which charges when the 1-Wire bus signal line is High (idle state). Some 1-Wire compatible devices will also feature a dedicated power pin, to ensure continuity of power should the 1-Wire bus be engaged in high activity for prolonged periods of time.
 

 
The 1-Wire bus provides for half duplex, bidirectional communication. It supports two data rates:

• Standard speed – in the region of 15kbps

• Overdrive speed – in the region of 111kbps.

The bus master initiates and controls all communication that takes place over the bus. There are four basic bus operations initiated by the master (quoted timings are for Standard speed operation):

• Bus Reset – used to initialize the bus and synchronize all slaves ready for a subsequent command. The master takes the bus Low for a defined time (typically 480us) and then releases the bus. Slaves will respond with a presence pulse. If the bus is Low when the master performs a bus sample (typically after an additional 70us has elapsed), devices are understood to be present. The operation is fully completed after a further defined delay (typically 410us).

• Write '1' – used to send a '1' to the 1-Wire slave devices. The master takes the bus Low for a short amount of time (typically 6us) and then releases the bus, with the operation fully completed after an additional defined delay (typically 64us).

• Write '0' – used to send a '0' to the 1-Wire slave devices. The master takes the bus Low for a longer amount of time (typically 60us) and then releases the bus, with the operation fully completed after an additional defined delay (typically 10us).

• Read – used to read a bit from the 1-Wire slave devices. The master takes the bus Low for a short amount of time (typically 6us) and then releases the bus. After a short delay (typically 9us) the master samples the bus to read the bit sent from the slave. The operation is fully completed after a further defined delay (typically 55us).

Unique Device IDs

A strong feature of the 1-Wire system is that each slave device carries with it a factory-lazered ID. This is an 8 byte code programmed by the manufacturer to guarantee a unique device. The 64 bits of this code are made up of three distinct parts. The first 8 bits provide the 1-Wire family code, the next 48 bits provide the serial number which is unique to each device. The last 8 bits provide a cyclic-redundancy-check of the first 56 bits. The full 64-bit code is stored in, and accessed from, a separate ROM within the device.

The bus master can use the uniqueness of each device's ROM ID to allow communications with a specific device, from a bus that can potentially have hundreds of slave devices attached to it.

1-Wire Support on the Desktop NanoBoard NB2DSK01

The NB2DSK01 provides a 1-Wire serial bus (ONE_WIRE_DB_PB), which is connected from its daughter board connector through to each of its peripheral board connectors. This provides the ability to communicate directly from a processor in an FPGA design, with one or more slave 1-Wire compatible devices located across plugged-in peripheral boards (where such devices exist). As the 1-Wire bus is made available to all three peripheral board sites it allows development of a dedicated network of 1-Wire devices – a micro-LAN if you will.

Each of Altium's peripheral boards provide a 1-Wire device socket for insertion of a single 1-Wire device of your choice. The socket is 3-pin, 1.27mm pitch. Pin 2 of the socket is wired to the ONE_WIRE_DB_PB signal line – corresponding to the DATA line of an inserted 1-Wire device.

Pins 1 and 3 of the socket are connected via 0Ω resistors to Ground.