Daughter Board Common-Bus SDRAM

The daughter board includes Synchronous Dynamic RAM as part of the common-bus block of memory resources available to the FPGA.

The SDRAM is provided in the form of two MT48LC16M16A2TG devices (from Micron Technology). Each device is a 256Mbit, high-speed CMOS SDRAM, organized as 16M x 16 bits (4M x 16 bits x 4 banks) – combined together to give 16M x 32-bit storage (64MByte). Both devices are powered by the daughter board's 3.3V supply.

Location on Board

The common-bus SDRAM device on the component side of the board is located towards the top-center of the board, and to the left of the common-bus SRAM device.

Figure 1. Common-bus SDRAM on the component
side (as seen on the DB30).

The common-bus SDRAM device on the solder side of the board is located towards the top-center of the board, and to the right of the common-bus SRAM device.

Figure 2. Common-bus SDRAM on the solder side
(as seen on the DB30).

Schematic Reference

The common-bus SDRAM devices can be found on sheet SDRAM_MT48LC16M16A2TG_16Mx32.SchDoc (entitled 16M x 32 SDRAM TSOP54 x 2) of the daughter board schematics.

The common-bus memory block and interface wiring can be found on sheet NB2_CommonMemory.SchDoc (entitled Common-Bus Memory Block).

Further Device Information

For more information on the MT48LC16M16A2TG device, refer to the datasheet (256MSDRAM.pdf) available at www.micron.com.