Daughter Board Common-Bus Flash Memory

Frozen Content

The daughter board includes Flash memory as part of the common-bus block of memory resources available to the FPGA.

The Flash memory is provided in the form of an S29GL256N11FFIV10 device (from Spansion). The Page Mode 256Mbit device is manufactured using 110nm MirrorBit™ technology and is organized as 16M x 16 bits (32MByte). It is powered by the daughter board's 3.3V supply and offers a 110ns access time.

Although this device can operate with 8-bit or 16-bit data bus widths, it has been fixed at 16-bit for the daughter board.

Location on Board

The common-bus Flash memory device is located on the component side of the board, directly below the common-bus SRAM and to the left of the power supply test points.


Figure 1. Common-bus Flash memory (as seen
on the DB30).

Schematic Reference

The common-bus Flash memory device can be found on sheet FLASH_S29GL256N11FFIV10_16Mx16.SchDoc (entitled 16M x 16 Flash Memory (BGA)) of the daughter board schematics.

The common-bus memory block and interface wiring can be found on sheet NB2_CommonMemory.SchDoc (entitled Common-Bus Memory Block).

Further Device Information

For more information on the S29GL256N11FFIV10 device, refer to the datasheet (s29gl-n_00_b3_e.pdf) available at www.spansion.com.

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