Tutorial - Checking Signal Integrity on an FPGA Design
Altium Designer's Signal Integrity tool can be used to find the optimum drive and slew settings for specific FPGA pins – for example IO pins used as data lines in an FPGA design.
In this tutorial, we are going to answer the question "How hard can I drive the signals D[31..0] before ringing and crosstalk will prevent correct operation?" Or alternatively, "What is the optimum slew and drive settings to use for FPGA pins driving signals D[31..0]?"
This tutorial relates to the example project
Nbp-28.PrjPcb, which can be found in the
\Examples\Signal Integrity\Nbp-28 folder of the Altium Designer examples. This example is based on the daughterboard, NBP28. This daughterboard includes a Xilinx Spartan 3, a Sharp LH79520 incorporating an ARM 7 processor, SRAM and Flash memory.